AVDD = IOV
參數(shù)資料
型號(hào): ADUC7128BSTZ126-RL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 34/92頁(yè)
文件大小: 0K
描述: IC DAS MCU ARM7 ADC/DDS 64-LQFP
產(chǎn)品培訓(xùn)模塊: ARM7 Applications & Tools
Intro to ARM7 Core & Microconverters
Process Control
Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
標(biāo)準(zhǔn)包裝: 1
系列: MicroConverter® ADuC7xxx
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 41.78MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: PLA,POR,PWM,PSM,溫度傳感器,WDT
輸入/輸出數(shù): 28
程序存儲(chǔ)器容量: 126KB(63K x 16)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 8K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 10x12b; D/A 1x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 64-LQFP
包裝: 標(biāo)準(zhǔn)包裝
配用: EVAL-ADUC7128QSPZ-ND - KIT DEV FOR ADUC7128
其它名稱: ADUC7128BSTZ126-RLDKR
ADuC7128/ADuC7129
Rev. 0 | Page 4 of 92
SPECIFICATIONS
AVDD = IOVDD = 3.0 V to 3.6 V, VREF = 2.5 V internal reference, fCORE = 41.78 MHz. All specifications TA = TMAX to TMIN, unless
otherwise noted.
Table 1.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
ADC CHANNEL SPECIFICATIONS
Eight acquisition clocks and fADC/2
ADC Power-Up Time
5
μs
DC Accuracy1, 2
Resolution
12
Bits
Integral Nonlinearity3
±0.7
±2.0
LSB
2.5 V internal reference 85°C to 125°C only
±0.7
±1.5
LSB
2.5 V internal reference 40°C to +85°C
±2.0
LSB
1.0 V external reference
Differential Nonlinearity3
±0.5
+1/0.9
LSB
2.5 V internal reference
±0.6
LSB
1.0 V external reference
DC Code Distribution
1
LSB
ADC input is a dc voltage
ENDPOINT ERRORS4
Offset Error
±5
LSB
Offset Error Match
±1
LSB
Gain Error
±5
LSB
Gain Error Match
±1
LSB
DYNAMIC PERFORMANCE
FIN = 10 kHz sine wave, fSAMPLE = 1 MSPS
Signal-to-Noise Ratio (SNR)
69
dB
Total Harmonic Distortion (THD)
78
dB
Peak Harmonic or Spurious Noise
75
dB
Channel-to-Channel Crosstalk
80
dB
Crosstalk Between Channel 12 and
Channel 13
60
dB
ANALOG INPUT
Input Voltage Ranges
Differential Mode5
VCM ± VREF/2
V
Single-Ended Mode
0 to VREF
V
Leakage Current
±15
μA
85°C to 125°C only
±1
±3
μA
40°C to +85°C
Input Capacitance
20
pF
During ADC acquisition
ON-CHIP VOLTAGE REFERENCE
0.47 μF from VREF to AGND
Output Voltage
2.5
V
Accuracy
±2.5
mV
Measured at TA = 25°C
Reference Drop When DAC Enabled
9
mV
Reference drop when DAC enabled
Reference Temperature Coefficient
±40
ppm/°C
Power Supply Rejection Ratio
80
dB
Output Impedance
40
Ω
Internal VREF Power-On Time
1
ms
EXTERNAL REFERENCE INPUT6
Input Voltage Range
0.625
AVDD
V
Input Impedance
38
DAC CHANNEL SPECIFICATIONS
VDAC Output
RL = 5 kΩ, CL = 100 pF
Voltage Swing
(0.33 × VREF ±
0.2 × VREF) ×
1.33
VREF is the internal 2.5 V reference
I/V Output Resistance
7
Ω
V mode selected
Low-Pass Filter 3 dB Point
1
MHz
2-pole at 1.5 MHz and 2 MHz
Resolution
10
Bits
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