參數(shù)資料
型號： ADUC7023BCP6Z62IRL
廠商： Analog Devices Inc
文件頁數(shù)： 79/96頁
文件大?。?/td> 0K
描述： IC MCU 12BIT 62KB FLASH 40LFCSP
標(biāo)準(zhǔn)包裝： 2,500
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 44MHz
連通性： I²C，SPI
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 20
程序存儲器容量： 64KB（32K x 16）
程序存儲器類型： 閃存
RAM 容量： 2K x 32
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 12 x12b; D/A 4x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 125°C
封裝/外殼： 40-VFQFN 裸露焊盤，CSP
包裝： 帶卷 (TR)
ADuC7023
Data Sheet
| Page 80 of 96
IRQP0 Register
Name:
IRQP0
Address:
0xFFFF0020
Default value: 0x00000000
Access:
Read and write
Table 92. IRQP0 MMR Bit Designations
Bit
Name
Description
31
Reserved
Reserved bit
30 to 28
PLLPI
A priority level of 0 to 7 can be set for
PLL lock interrupt.
27
Reserved
Reserved bit
26 to 24
ADCPI
A priority level of 0 to 7 can be set for
the ADC interrupt source.
23
Reserved
Reserved bit
22 to 20
FlashPI
A priority level of 0 to 7 can be set for
the Flash controller interrupt source.
19
Reserved
Reserved bit.
18 to 16
T2PI
A priority level of 0 to 7 can be set for
Timer2.
15
Reserved
Reserved bit.
14 to 12
T1PI
A priority level of 0 to 7 can be set for
Timer1.
11
Reserved
Reserved bit.
10 to 8
T0PI
A priority level of 0 to 7 can be set for
Timer0.
7
Reserved
Reserved bit
6 to 4
SWINTP
A priority level of 0 to 7 can be set for
the software interrupt source.
3 to 0
Reserved
Interrupt 0 cannot be prioritized.
IRQP1 Register
Name:
IRQP1
Address:
0xFFFF0024
Default value: 0x00000000
Access:
Read and write
Table 93. IRQP1 MMR Bit Designations
Bit
Name
Description
31
Reserved
Reserved bit.
30 to 28
PSMPI
A priority level of 0 to 7 can be set for
the power supply monitor interrupt
source.
27
Reserved
Reserved bit.
26 to 24
COMPI
A priority level of 0 to 7 can be set for
comparator.
23
Reserved
Reserved bit.
22 to 20
IRQ0PI
A priority level of 0 to 7 can be set for
IRQ0.
19
Reserved
Reserved bit.
Bit
Name
Description
18 to 16
SPIPI
A priority level of 0 to 7 can be set for
SPI.
15
Reserved
Reserved bit.
14 to 12
I2C1SPI
A priority level of 0 to 7 can be set for
I2C1 slave.
11
Reserved
Reserved bit.
10 to 8
I2C1MPI
A priority level of 0 to 7 can be set for
I2C1 master.
7
Reserved
Reserved bits.
6 to 4
I2C0SPI
A priority level of 0 to 7 can be set for
I2C0 slave.
3
Reserved
Reserved bits.
2 to 0
I2C0MPI
A priority level of 0 to 7 can be set for
I2C0 master.
IRQP2 Register
Name:
IRQP2
Address:
0xFFFF0028
Default value: 0x00000000
Access:
Read and write
Table 94. IRQP2 MMR Bit Designations
Bit
Name
Description
31 to 23
Reserved
Reserved bit.
22 to 20
PWMPI
A priority level of 0 to 7 can be set for
PWM.
19
Reserved
Reserved bit.
18 to 16
PLA1PI
A priority level of 0 to 7 can be set for
PLA IRQ1.
15
Reserved
Reserved bit.
14 to 12
IRQ3PI
A priority level of 0 to 7 can be set for
IRQ3.
11
Reserved
Reserved bit.
10 to 8
IRQ2PI
A priority level of 0 to 7 can be set for
IRQ2.
7
Reserved
Reserved bit.
6 to 4
PLA0PI
A priority level of 0 to 7 can be set for
PLA IRQ0.
3
Reserved
Reserved bit.
2 to 0
IRQ1PI
A priority level of 0 to 7 can be set for
IRQ1.
Rev. E
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