參數(shù)資料
型號: ADT7470ARQZ
廠商: ANALOG DEVICES INC
元件分類: 溫度/濕度傳感器
英文描述: DIGITAL TEMP SENSOR-SERIAL, 7BIT(s), RECTANGULAR, SURFACE MOUNT
封裝: ROHS COMPLIANT, MO-137AB, QSOP-16
文件頁數(shù): 29/40頁
文件大?。?/td> 962K
代理商: ADT7470ARQZ
ADT7470
Rev. C | Page 35 of
40
Table 42. Register 0x72. Interrupt Mask Register 1 (Power-On Default = 0x00).
Bit Name
Read/Write
Description
[7] Not in use
Read/Write
Not in use. Write 0 to this bit.
[6] R7T
Read/Write
A 1 masks the Temperature 7 value from generating an interrupt on the SMBALERT
output. The R1T bit is set as normal in the status register for out-of-limit conditions.
[5] R6T
Read/Write
A 1 masks the Temperature 6 value from generating an interrupt on the SMBALERT
output. The R2T bit is set as normal in the status register for out-of-limit conditions.
[4] R5T
Read/Write
A 1 masks the Temperature 5 value from generating an interrupt on the SMBALERT
output. The R3T bit is set as normal in the status register for out-of-limit conditions.
[3] R4T
Read/Write
A 1 masks the Temperature 4 value from generating an interrupt on the SMBALERT
output. The R4T bit is set as normal in the status register for out-of-limit conditions.
[2] R3T
Read/Write
A 1 masks the Temperature 3 value from generating an interrupt on the SMBALERT
output. The R5T bit is set as normal in the status register for out-of-limit conditions.
[1] R2T
Read/Write
A 1 masks the Temperature 2 value from generating an interrupt on the SMBALERT
output. The R6T bit is set as normal in the status register for out-of-limit conditions.
[0] R1T
Read/Write
A 1 masks the Temperature 1 value from generating an interrupt on the SMBALERT
output. The R7T bit is set as normal in the status register for out-of-limit conditions.
Table 43. Register 0x73. Interrupt Mask Register 2 (Power-On Default = 0x00).
Bit Name
Read/Write
Description
[7] Fan 4
Read/Write
A 1 masks the Fan 4 value from generating an interrupt on the SMBALERT output.
The Fan 4 bit is set as normal in the status register for out-of-limit conditions.
[6] Fan 3
Read/Write
A 1 masks the Fan 3 value from generating an interrupt on the SMBALERT output.
The Fan 3 bit is set as normal in the status register for out-of-limit conditions.
[5] Fan 2
Read/Write
A 1 masks the Fan 2 value from generating an interrupt on the SMBALERT output.
The Fan 2 bit is set as normal in the status register for out-of-limit conditions.
[4] Fan 1
Read/Write
A 1 masks the Fan 1 value from generating an interrupt on the SMBALERT output.
The Fan 1 bit is set as normal in the status register for out-of-limit conditions.
[3] Not in use
Read/Write
Not in use. Write 0 to this bit.
[2] R10T
Read/Write
A 1 masks the Temperature 10 value from generating an interrupt on the SMBALERT
output. The R10T bit is set as normal in the status register for out-of-limit conditions.
[1] R9T
Read/Write
A 1 masks the Temperature 9 value from generating an interrupt on the SMBALERT
output. The R9T bit is set as normal in the status register for out-of-limit conditions.
[0] R8T
Read/Write
A 1 masks the Temperature 8 value from generating an interrupt on the SMBALERT
output. The R8T bit is set as normal in the status register for out-of-limit conditions.
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