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參數(shù)資料
| 型號(hào)： | ADSP-TS203SABPZ050 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | 500 MHz TigerSHARC Processor with 4 Mbit on-chip embedded DRAM; Package: 576 ball SBGA; No of Pins: 576; Temperature Range: Ind |
| 中文描述： | 32-BIT, 125 MHz, OTHER DSP, PBGA576 |
| 封裝： | 25 X 25 MM, MS-034, BGA-576 |
| 文件頁(yè)數(shù)： | 32/48頁(yè) |
| 文件大?。?/td> | 2017K |
| 代理商： | ADSP-TS203SABPZ050 |
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Rev. C
|
Page 38 of 48
|
December 2006
ADSP-TS203S
Figure 41. Typical Output Rise and Fall Time (10% to 90%, VDD_IO =2.5 V)
vs. Load Capacitance at Strength 4
Figure 42. Typical Output Rise and Fall Time (10% to 90%, VDD_IO =2.5 V)
vs. Load Capacitance at Strength 5
Figure 43. Typical Output Rise and Fall Time (10% to 90%, VDD_IO =2.5 V)
vs. Load Capacitance at Strength 6
R
IS
E
A
N
D
F
A
L
T
IM
E
S
(n
s
)
LOAD CAPACITANCE (pF)
0
10
20
30
40
50
60
70
80
90
100
0
5
10
15
20
25
STRENGTH 4
(VDD_IO =2.5V)
RISE TIME
Y = 0.0573x + 0.9789
FALL TIME
Y = 0.0592x + 1.0629
R
IS
E
A
N
D
F
A
L
T
IM
E
S
(n
s
)
LOAD CAPACITANCE (pF)
0
10
20
30
40
50
60
70
80
90
100
0
5
10
15
20
25
RISE TIME
Y = 0.0481
x +0.7889
FALL TIME
Y = 0.0493x + 0.8389
STRENGTH 5
(VDD_IO =2.5V)
R
IS
E
A
N
D
F
A
L
T
IM
E
S
(n
s
)
LOAD CAPACITANCE (pF)
0
10
20
30
40
50
60
70
80
90
100
0
5
10
15
20
25
RISE TIME
Y = 0.0377
x +0.7449
FALL TIME
Y = 0.0374x + 0.851
STRENGTH 6
(VDD_IO =2.5V)
Figure 44. Typical Output Rise and Fall Time (10% to 90%, VDD_IO =2.5 V)
vs. Load Capacitance at Strength 7
Figure 45. Typical Output Valid (VDD_IO = 2.5 V) vs. Load Capacitance at Max
Case Temperature and Strength 0 to 71
1 The line equations for the output valid vs. load capacitance are:
Strength 0: y = 0.0956x + 3.5662
Strength 1: y = 0.0523x + 3.2144
Strength 2: y = 0.0433x + 3.1319
Strength 3: y = 0.0391x + 2.9675
Strength 4: y = 0.0393x + 2.7653
Strength 5: y = 0.0373x + 2.6515
Strength 6: y = 0.0379x + 2.1206
Strength 7: y = 0.0399x + 1.9080
R
IS
E
A
N
D
F
A
L
T
IM
E
S
(n
s
)
LOAD CAPACITANCE (pF)
0
10
20
30
40
50
60
70
80
90
100
0
5
10
15
20
25
STRENGTH 7
(VDD_IO =2.5V)
RISE TIME
Y = 0.0321
x +0.6512
FALL TIME
Y = 0.0313x + 0.818
0
102030
405060
708090
100
0
5
10
15
O
U
T
P
U
T
V
A
L
ID
(n
s
)
LOAD CAPACITANCE (pF)
1
2
3
4
5
6
7
STRENGTH 0–7
(VDD_IO =2.5V)
0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADSP-TS203SBBPZ050 | 制造商:Analog Devices 功能描述:DSP - Bulk |
| ADSQ-1410 | 制造商:MURATA-PS 制造商全稱:Murata Power Solutions Inc. 功能描述:Quad 14-Bit, 10 MSPS Sampling A/D Converter |
| ADSQ-1410-C | 制造商:MURATA-PS 制造商全稱:Murata Power Solutions Inc. 功能描述:Quad 14-Bit, 10 MSPS Sampling A/D Converter |
| ADSQ-1410-EX-C | 制造商:MURATA-PS 制造商全稱:Murata Power Solutions Inc. 功能描述:Quad 14-Bit, 10 MSPS Sampling A/D Converter |
| ADSQ-1410S | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 0 to 70C 66-pin DIP Quad 14-Bit, 10MPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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