- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄19381 > ADSP-2191MBCA-140 (Analog Devices Inc)IC DSP CONTROLLER 16BIT 144MBGA PDF資料下載
參數(shù)資料
| 型號(hào)： | ADSP-2191MBCA-140 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 13/48頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP CONTROLLER 16BIT 144MBGA |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | ADSP-21xx |
| 類型： | 定點(diǎn) |
| 接口： | 主機(jī)接口，SPI，SSP，UART |
| 時(shí)鐘速率： | 140MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 160kB |
| 電壓 - 輸入/輸出： | 3.00V，3.30V |
| 電壓 - 核心： | 2.50V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 144-LFBGA |
| 供應(yīng)商設(shè)備封裝： | 144-迷你型BGA |
| 包裝： | 托盤 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁當(dāng)前第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁
ADSP-2191M
–20–
REV. A
TIMING SPECIFICATIONS
This section contains timing information for the DSP’s external
signals. Use the exact information given. Do not attempt to derive
parameters from the addition or subtraction of other information.
While addition or subtraction would yield meaningful results for
an individual device, the values given in this data sheet reflect
statistical variations and worst cases. Consequently, parameters
cannot be added meaningfully to derive longer times.
Switching characteristics specify how the processor changes its
signals. No control is possible over this timing; circuitry external
to the processor must be designed for compatibility with these
signal characteristics. Switching characteristics indicate what the
processor will do in a given circumstance. Switching character-
istics can also be used to ensure that any timing requirement of
a device connected to the processor (such as memory) is satisfied.
Timing requirements apply to signals that are controlled by
circuitry external to the processor, such as the data input for a
read operation.Timing requirements guarantee that the
processor operates correctly with other devices.
Clock In and Clock Out Cycle Timing
binations of CLKIN and clock multipliers must not select
core/peripheral clocks in excess of 160/80 MHz for commercial
grade and 140/70 MHz for industrial grade, when the peripheral
clock rate is one-half the core clock rate. If the peripheral clock
rate is equal to the core clock rate, the maximum peripheral clock
rate is 80 MHz for both commercial and industrial grade parts.
The peripheral clock is supplied to the CLKOUT pins.
When changing from bypass mode to PLL mode, allow 512
HCLK cycles for the PLL to stabilize.
Table 9. Clock In and Clock Out Cycle Timing
Parameter
Min
Max
Unit
Switching Characteristics
t
CKOD
CLKOUT Delay from CLKIN
0
5.8
ns
t
CKO
CLKOUT Period
1
12.5
ns
Timing Requirements
t
CK
CLKIN Period2, 3
10
200
ns
t
CKL
CLKIN Low Pulse
4.5
ns
t
CKH
CLKIN High Pulse
4.5
ns
t
WRST
RESET Asserted Pulsewidth Low
200t
CLKOUT
ns
t
MSS
MSELx/BYPASS Stable Before
RESET Deasserted Setup
40
s
t
MSH
MSELx/BYPASS Stable After
RESET Deasserted Hold
1000
ns
t
MSD
MSELx/BYPASS Stable After
RESET Asserted
200
ns
t
PFD
Flag Output Disable Time After
RESET Asserted
10
ns
1CLKOUT jitter can be as great as 8 ns when CLKOUT frequency is less than 20 MHz. For frequencies greater than 20 MHz, jitter is less than 1 ns.
2In clock multiplier mode and MSEL6–0 set for 1:1 (or CLKIN = CCLK), t
CK = tCCLK.
3In bypass mode, t
CK = tCCLK.
Figure 8. Clock In and Clock Out Cycle Timing
tCKOD
CLKOUT
MSEL6–0
BYPASS
DF
RESET
CLKIN
tWRST
tCDD
tCK
tCKL
tMSH
tCKO
tPFD
tMSD
tMSS
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| RSA30DTMD-S273 | CONN EDGECARD 60POS R/A .125 SLD |
| RMA30DTMD-S273 | CONN EDGECARD 60POS R/A .125 SLD |
| RSA30DTBD-S273 | CONN EDGECARD 60POS R/A .125 SLD |
| TPSC337K004R0100 | CAP TANT 330UF 4V 10% 2312 |
| MC78M08CT | IC REG LDO 8V .5A TO220AB |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADSP-2191MBCAZ-140 | 功能描述:IC DSP CONTROLLER 16BIT 144MBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:ADSP-21xx 標(biāo)準(zhǔn)包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點(diǎn) 接口:I²C，McASP，McBSP 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| ADSP-2191MBST-140 | 制造商:Analog Devices 功能描述:DSP 16-Bit 140MHz 140MIPS 144-Pin LQFP 制造商:Analog Devices 功能描述:IC MICROCOMPUTER 16-BIT |
| ADSP-2191MBSTZ-140 | 功能描述:IC DSP CONTROLLER 16BIT 144LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:ADSP-21xx 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-2191MKCA-160 | 功能描述:IC DSP CONTROLLER 16BIT 144MBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:ADSP-21xx 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-2191MKCAZ-160 | 功能描述:IC DSP CONTROLLER 16BIT 144MBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:ADSP-21xx 標(biāo)準(zhǔn)包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點(diǎn) 接口:I²C，McASP，McBSP 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。