參數(shù)資料
型號(hào)： ADSP-21161N
廠商： Analog Devices, Inc.
元件分類： 數(shù)字信號(hào)處理
英文描述： DSP Microcomputer
中文描述： DSP微機(jī)
文件頁數(shù)： 2/60頁
文件大小： 1019K
代理商： ADSP-21161N
ADSP-21161N
–2–
REV. A
KEY FEATURES (continued)
1 M Bit On-Chip Dual-Ported SRAM (0.5 M Bit Block 0,
0.5 M Bit Block 1) for Independent Access by Core
Processor and DMA
200 Million Fixed-Point MACs Sustained Performance
Dual Data Address Generators (DAGs) with Modulo and
Bit-Reverse Addressing
Zero-Overhead Looping with Single-Cycle Loop Setup,
Providing Efficient Program Sequencing
IEEE 1149.1 JTAG Standard Test Access Port and On-Chip
Emulation
Single Instruction Multiple Data (SIMD) Architecture
Provides:
Two Computational Processing Elements
Concurrent Execution—Each Processing Element
Executes the Same Instruction, but Operates on
Different Data
Code Compatibility—At Assembly Level, Uses the
Same Instruction Set as Other SHARC DSPs
Parallelism in Buses and Computational Units Enables:
Single-Cycle Execution (with or without SIMD) of: a
Multiply Operation, an ALU Operation, a Dual
Memory Read or Write, and an Instruction Fetch
Transfers Between Memory and Core at Up to Four
32-Bit Floating- or Fixed-Point Words Per Cycle,
Sustained 1.6 Gbytes/s Bandwidth
Accelerated FFT Butterfly Computation through a
Multiply with Add and Subtract
DMA Controller Supports:
14 Zero-Overhead DMA Channels for Transfers between
ADSP-21161N Internal Memory and External Memory,
External Peripherals, Host Processor, Serial Ports,
Link Ports, or Serial Peripheral Interface (SPI-
Compatible)
64-Bit Background DMA Transfers at Core Clock Speed,
in Parallel with Full-Speed Processor Execution
800 M Bytes/s Transfer Rate over IOP Bus
Host Processor Interface to 8-, 16-, and 32-Bit
Microprocessors; the Host Can Directly Read/Write
ADSP-21161N IOP Registers
32-Bit (or up to 48-Bit) Wide Synchronous External Port
Provides:
Glueless Connection to Asynchronous, SBSRAM and
SDRAM External Memories
Memory Interface Supports Programmable Wait State
Generation and Wait Mode for Off-Chip Memory
Up to 50 MHz Operation for Non-SDRAM Accesses
1:2, 1:3, 1:4, 1:6, 1:8 Clock into Core Clock Frequency
Multiply Ratios
24-Bit Address, 32-Bit Data Bus. 16 Additional Data
Lines via Multiplexed Link Port Data Pins Allow
Complete 48-Bit Wide Data Bus for Single-Cycle
External Instruction Execution
Direct Reads and Writes of IOP Registers from Host or
Other 21161N DSPs
62.7 Mega-Word Address Range for Off-Chip SRAM and
SBSRAM Memories
32-48, 16-48, 8-48 Execution Packing for Executing
Instruction Directly from 32-Bit, 16-Bit, or 8-Bit Wide
External Memories
32-48, 16-48, 8-48, 32-32/64, 16-32/64, 8-32/64, Data
Packing for DMA Transfers Directly from 32-Bit,
16-Bit, or 8-Bit Wide External Memories to and from
Internal 32-, 48-, or 64-Bit Internal Memory
Can be Configured to have 48-Bit Wide External Data
Bus, if Link Ports are not Used. The Link Port Data
Lines are Multiplexed with the Data Lines D0 to D15
and are Enabled through Control Bits in SYSCON
SDRAM Controller for Glueless Interface to Low Cost
External Memory
Zero Wait State, 100 MHz Operation for Most Accesses
Extended External Memory Banks (64 M Words) for
SDRAM Accesses
Page Sizes up to 2048 Words
An SDRAM Controller Supports SDRAM in Any and All
Memory Banks
Support for Interface to Run at Core Clock and Half the
Core Clock Frequency
Support for 16 M Bits, 64 M Bits, 128 M Bits, and
256 M Bits with SDRAM Data Bus Configurations of
4, 8, 16, and 32
254 Mega-Word Address Range for Off-Chip SDRAM
Memory
Multiprocessing Support Provides:
Glueless Connection for Scalable DSP Multiprocessing
Architecture
Distributed On-Chip Bus Arbitration for Parallel Bus
Connect of Up to Six ADSP-21161Ns, Global Memory,
and a Host
Two 8-Bit Wide Link Ports for Point-to-Point
Connectivity Between ADSP-21161Ns
400 M Bytes/s Transfer Rate over Parallel Bus
200 M Bytes/s Transfer Rate Over Link Ports
Serial Ports Provide:
Four 50 M Bit/s Synchronous Serial Ports with
Companding Hardware
8 Bidirectional Serial Data Pins, Configurable as Either a
Transmitter or Receiver
I
2
S Support, Programmable Direction for 8
Simultaneous Receive and Transmit Channels, or Up
to Either 16 Transmit Channels or 16 Receive
Channels
128 Channel TDM Support for T1 and E1 Interfaces
Companding Selection on a Per Channel Basis in TDM
Mode
Serial Peripheral Interface (SPI)
Slave Serial Boot through SPI from a Master SPI Device
Full-Duplex Operation
Master-Slave Mode Multimaster Support
Open-Drain Outputs
Programmable Baud Rates, Clock Polarities and Phases
12 Programmable I/O Pins
1 Programmable Timer
相關(guān)PDF資料
PDF描述
ADSP-21161NCCA-100 DSP Microcomputer
ADSP-21161NKCA-100 DSP Microcomputer
ADSP-21262SBBC-150 Embedded Processor
ADSP-21262SBBCZ150 Embedded Processor
ADSP-21262SKSTZ200 SHARC Processor
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADSP-21161NCCA-100 功能描述:IC DSP CONTROLLER 32BIT 225MBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤
ADSP-21161NCCAZ100 功能描述:IC DSP CONTROLLER 32BIT 225MBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤
ADSP-21161NKCA-100 功能描述:IC DSP CONTROLLER 32BIT 225MBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤
ADSP-21161NKCA-100Z 制造商:Analog Devices 功能描述:
ADSP-21161NKCAZ100 功能描述:IC DSP CONTROLLER 32BIT 225MBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*