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參數(shù)資料
| 型號： | ADSP-21262SBBCZ150 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | Embedded Processor |
| 中文描述： | 16-BIT, 50 MHz, OTHER DSP, PBGA136 |
| 封裝： | MO-205AE, BGA-136 |
| 文件頁數(shù)： | 1/48頁 |
| 文件大?。?/td> | 401K |
| 代理商： | ADSP-21262SBBCZ150 |
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SHARC and the SHARC logo are registered trademarks of Analog Devices, Inc.
SHARC
Embedded Processor
ADSP-21262
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
FAX: 781.461.3113
2005 Analog Devices, Inc. All rights reserved.
www.analog.com
SUMMARY
High performance 32-bit/40-bit floating-point processor
Code compatibility—at assembly level, uses the same
instruction set as other SHARC DSPs
Single-instruction multiple-data (SIMD) computational archi-
tecture—two 32-bit IEEE floating-point/32-bit fixed-point/
40-bit extended precision floating-point computational
units, each with a multiplier, ALU, shifter, and register file
High bandwidth I/O—a parallel port, an SPI
port, six serial
ports, a digital applications interface (DAI), and JTAG
DAI incorporates two precision clock generators (PCGs), an
input data port (IDP) that includes a parallel data acquisi-
tion port (PDAP), and three programmable timers, all
under software control by the signal routing unit (SRU)
On-chip memory—2M bit of on-chip SRAM and a dedicated
4M bit of on-chip mask-programmable ROM
The ADSP-21262 is available in commercial and industrial
temperature grades. For complete ordering information,
see
Ordering Guide on Page46
.
KEY FEATURES
Serial ports offer left-justified sample-pair and I
2
S support
via 12 programmable and simultaneous receive or trans-
mit pins, which support up to 24 transmit or 24 receive I
2
S
channels of audio when all six serial ports (SPORTs) are
enabled or six full duplex TDM streams of up to 128
channels per frame
At 200 MHz (5 ns) core instruction rate, the ADSP-21262
operates at 1200 MFLOPS peak/800 MFLOPS sustained
performance whether operating on fixed- or floating-point
data
400 MMACS sustained performance at 200 MHz
Super Harvard Architecture—three independent buses for
dual data fetch, instruction fetch, and nonintrusive, zero-
overhead I/O
Transfers between memory and core at up to four 32-bit
floating- or fixed-point words per cycle, sustained
2.4G byte/s bandwidth at 200 MHz core instruction rate
and 900M byte/sec is available via DMA
Figure 1. Functional Block Diagram
ADDR
DATA
PXREGISTER
6
JTAG TEST & EMULATION
20
3
SERIAL PORTS(6)
INPUT
DATA PORTS (8)
ACQUISITION PORT
TIMERS (3)
SIGNAL
UNIT
PRECISION CLOCK
GENERATORS(2)
DIGITAL APPLICATIONS INTERFACE
3
16
ADDRESS/
DATA BUS/ GPIO
CONTROL/GPIO
PARALLEL
PORT
IOP
REGISTERS
(MEMORY MAPPED)
STATUS,
DATA BUFFERS
4
SPI PORT (1)
DMA CONTROLLER
22 CHANNELS
4
GPIO FLAGS/
IRQ/TIMEXP
PROCESSING
ELEMENT
(PEY)
PELEMENT
(PEX)
TIMER
INSCACHE
32
48-BIT
DAG1
4
8
32
DAG2
4
8
32
32
PM ADDRESS BUS
DM ADDRESS BUS
PM DATA BUS
DM DATA BUS
64
64
CORE PROCESSOR
PROGRAM
SEQUENCER
ADDR
DATA
SRAM
1M BIT
ROM
2M BIT
DUAL PORTED MEMORY
BLOCK 0
SRAM
1M BIT
ROM
2M BIT
DUAL PORTED MEMORY
BLOCK 1
S
IOD
IOA
(18)
32
I/O PROCESSOR
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| ADSP-21262SKATZ-200 | 制造商:Analog Devices 功能描述: |
| ADSP-21262SKBC-200 | 功能描述:IC DSP 32BIT 200MHZ 136-CSPBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:SHARC® 標準包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-21262SKBC200R | 制造商:Analog Devices 功能描述:DSP Floating-Point 32-Bit 200MHz 200MIPS 136-Pin CSP-BGA T/R |
| ADSP-21262SKBC-200X | 制造商:Analog Devices 功能描述: |
| ADSP-21262SKBCZ200 | 功能描述:IC DSP CTLR 32BIT 136CSPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:SHARC® 標準包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點 接口:I²C，McASP，McBSP 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
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