參數(shù)資料
型號(hào)： ADS1194CZXGT
廠商： TEXAS INSTRUMENTS INC
元件分類： 模擬信號(hào)調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, PBGA64
封裝： 8 X 8 MM, GREEN, PLASTIC, NFBGA-64
文件頁(yè)數(shù)： 43/76頁(yè)
文件大?。?/td> 1193K
代理商： ADS1194CZXGT
SBAS471B
– APRIL 2010 – REVISED APRIL 2011
GPIO: General-Purpose I/O Register
Address = 14h
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
GPIOD4
GPIOD3
GPIOD2
GPIOD1
GPIOC4
GPIOC3
GPIOC2
GPIOC1
The General-Purpose I/O Register controls the action of the three GPIO pins.
Bits [7:4]
GPIOD[4:1]: GPIO data
These bits are used to read and write data to the GPIO ports.
When reading the register, the data returned correspond to the state of the GPIO external pins, whether they are
programmed as inputs or as outputs. As outputs, a write to the GPIOD sets the output value. As inputs, a write to the
GPIOD has no effect. GPIO is not available in certain respiration modes.
Bits [3:0]
GPIOC[4:1]: GPIO control (corresponding GPIOD)
These bits determine if the corresponding GPIOD pin is an input or output.
0 = Output
1 = Input (default)
PACE: PACE Detect Register
Address = 15h
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
0
PACEE1
PACEE0
PACEO1
PACEO0
PD_PACE
This register provides the PACE controls that configure the channel signal used to feed the external PACE detect
circuitry. See the Pace Detect subsection of the ECG-Specific Functions section for details.
Bits [7:5]
Must always be set to '0'
Bits [4:3]
PACEE[1:0]: PACE even channels
These bits control the selection of the even number channels available on TEST_PACE_OUT1. Note that only one channel
may be selected at any time.
00 = Channel 2 (default)
01 = Channel 4
10 = Channel 6, ADS1196/8 only
11 = Channel 8, ADS1198 only
Bits [2:1]
PACEO[1:0]: PACE odd channels
These bits control the selection of the odd number channels available on TEST_PACE_OUT2. Note that only one channel
may be selected at any time.
00 = Channel 1 (default)
01 = Channel 3
10 = Channel 5, ADS1196/8 only (default)
11 = Channel 7, ADS1198 only
Bit [0]
PD_PACE: PACE detect buffer
This bit is used to enable/disable the PACE detect buffer.
0 = PACE detect buffer turned off (default)
1 = PACE detect buffer turned on
48
Copyright
2010–2011, Texas Instruments Incorporated
Product Folder Link(s): ADS1194 ADS1196 ADS1198
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