- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374016 > ADMCF341-EVALKIT (Analog Devices, Inc.) DashDSP⑩ 28-Lead Flash Mixed-Signal DSP with Enhanced Analog Front End PDF資料下載
參數(shù)資料
| 型號： | ADMCF341-EVALKIT |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | DashDSP⑩ 28-Lead Flash Mixed-Signal DSP with Enhanced Analog Front End |
| 中文描述： | DashDSP⑩28引腳閃存混合信號增強(qiáng)的DSP與模擬前端 |
| 文件頁數(shù)： | 4/36頁 |
| 文件大?。?/td> | 1106K |
| 代理商： | ADMCF341-EVALKIT |
第1頁第2頁第3頁當(dāng)前第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
REV. 0
–4–
ADMCF341
SPECIFICATIONS
(continued)
FLASH MEMORY
Parameter
Min
Typ
Max
Unit
Conditions/Comments
Endurance
Data Retention
Program and Erase Operating Temperature
Read Operating Temperature
10,000
15
0
–40
Cycles
Years
∞
C
∞
C
Cycle = Erase/Program/Verify
85
+85
Specifications subject to change without notice.
TIMING PARAMETERS
Parameter
Min
Max
Unit
Clock Signals
Signal t
CK
is defined as 0.5 t
CKIN
. The ADMCF341 uses an input clock with
a frequency equal to half the instruction rate; a 10 MHz input clock (which is
equivalent to 100 ns) yields a 50 ns processor cycle (equivalent to 20 MHz).
When t
CK
values are within the range of 0.5 t
CKIN
period, they should be
substituted for all relevant timing parameters to obtain specification value as
in the following example:
t
t
ns
ns
ns
ns
CKH
CK
=
-
=
￥
-
=
0 5
.
10
0 5
.
50
10
15
Timing Requirements:
t
CKIN
t
CKIL
t
CKIH
Switching Characteristics:
t
CKL
t
CKH
t
CKOH
Control Signals
Switching Characteristics
t
RSP
PWM Shutdown Signals
Switching Characteristics
t
PWMTPW
PWMTRIP
Width Low
CLKIN Period
CLKIN Width Low
CLKIN Width High
100
20
20
150
ns
ns
ns
CLKOUT Width Low
CLKOUT Width High
CLKIN High to CLKOUT High
0.5 t
CK
– 10
0.5 t
CK
– 10
0
ns
ns
ns
20
RESET
Width Low
5 t
CK
*
ns
t
CK
ns
*
Applies after power-up sequence is complete.
Specifications subject to change without notice.
CLKIN
CLKOUT
t
CKL
t
CKIL
t
CKH
t
CKIH
t
CKIN
t
CKOH
Figure 1. Clock Signals
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADN2811 | OC-48/OC-48 FEC Clock and Data Recovery IC with Integrated Limiting Amp |
| ADN2811ACP-CML | OC-48/OC-48 FEC Clock and Data Recovery IC with Integrated Limiting Amp |
| ADN2811ACP-CML-RL | OC-48/OC-48 FEC Clock and Data Recovery IC with Integrated Limiting Amp |
| ADN2812 | Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp |
| ADN2812ACP | Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD-MCX-RPSMAF | 功能描述:ADAPTER AU RPSMA FEM-MCX APPLE RoHS:是 類別:RF/IF 和 RFID >> RF配件 系列:* 標(biāo)準(zhǔn)包裝:1 系列:* |
| AD-MD3FF | 制造商:Pan Pacific 功能描述: |
| AD-MD4FF | 制造商:Pan Pacific 功能描述: |
| AD-MD6F/D5M | 制造商:Pan Pacific 功能描述: |
| AD-MD6FF | 制造商:Pan Pacific 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。