參數(shù)資料
型號(hào)： ADM1034ARQZ-REEL
廠商： ON Semiconductor
文件頁(yè)數(shù)： 18/38頁(yè)
文件大?。?/td> 427K
描述： IC THERM/FAN SPEED CTRLR 16-QSOP
產(chǎn)品變化通告： MFG CHG Notification ADI to ON Semi
標(biāo)準(zhǔn)包裝： 2,500
功能： 風(fēng)扇控制，溫度監(jiān)控器
傳感器類型： 內(nèi)部和外部
感應(yīng)溫度： -40°C ~ 125°C，外部傳感器
精確度： ±1°C
拓?fù)洌?/td> ADC，比較器，多路復(fù)用器，寄存器庫(kù)
輸出類型： SMBus?
輸出警報(bào)： 是
輸出風(fēng)扇： 是
電源電壓： 3 V ~ 5.5 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 16-SSOP（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 16-QSOP
包裝： 帶卷 (TR)
ADM1034
http://onsemi.com
18
Table 17. INTERRUPT STATUS REGISTER 1
(REG. 0X4F)
Bit #
Name
Description
7
LH
1 = Local high temperature limit has been
exceeded.
6
LL
1 = Local low temperature limit has been
exceeded.
5
R1H
1 = Remote 1 high temperature limit has
been exceeded.
4
R1L
1 = Remote 1 low temperature limit has
been exceeded.
3
R1D
1 = Remote 1 diode error; indicates an
open or short on the D1+/D1 pins.
2
R2H
1 = Remote 2 high temperature limit has
been exceeded.
1
R2L
1 = Remote 2 low temperature limit has
been exceeded.
0
R2D
1 = Remote 2 diode error; indicates an
open or short on the D2+/D2 pins.
Table 18. STATUS REGISTER 2 (REG. 0X50)
Bit #
Name
Description
7
LT
1 = Local THERM
 temperature limit has
been exceeded.
6
R1T
1 = Remote 1 THERM
 temperature limit
has been exceeded.
5
R2T
1 = Remote 2 THERM
 temperature limit
has been exceeded.
4
T%
1 = THERM
 % ontime limit has been
exceeded.
3
TA
1 = One of the THERM
 limits has been
exceeded; and the THERM
 output signal
has been asserted.
2
TS
1 = THERM
 state. Indicates the THERM
pin is active; clears on a read if THERM
is not active. Does not generate an
ALERT
 in ALERT
 comp mode.
1
Res
Reserved
0
Res
Reserved
Table 19. STATUS REGISTER 3 (REG. 0X51)
Bit #
Name
Description
7
F1S
1 = Fan 1 has stalled.
6
FA
1 = Fan alarm speed. Fan1 and Fan 2
are running at alarm speed.
5
F2S
1 = Fan 2 has stalled.
4
Res
Reserved
3
Res
Reserved
2
Res
Reserved
1
Res
Reserved
0
ALERT
1 = ALERT
 low; indicates the ALERT
line has been pulled low.
ALERT
 Interrupt Behavior
The ADM1034 generates an ALERT
  whenever an
out-of-limit measurement is made (if it is not masked out).
The user can also detect out-of-limit conditions by polling
the ADM1034 status registers. It is important to note how
the SMBus ALERT
 output behaves when writing interrupt
handler software.
The ALERT
 output on the ADM1034 can be programmed
to operate in either SMBusALERT
 mode or in comp mode.
In SMBusALERT
 mode, the ALERT
 output remains low
until the measurement falls back within its programmed
limits and either the status register is read or an ARA is
completed. In comp mode, the ALERT
 output automatically
resets once the temperature measurement falls back within
the programmed limits.
Configuring the ALERT
 Output
For SMBusALERT
 mode, set the ALERT
 configuration bit
(Bit 3) of the Configuration Register 1 (Address 0x01) to 0.
In SMBusALERT
  mode, a status bit is set when a
measurement goes outside of its programmed limit. If the
corresponding mask bit is not set, the ALERT
 output is
pulled low. If the measured value falls back within the limits,
the ALERT
 output remains low until the corresponding
status register is read or until an ARA is completed (as long
as no other measurement is outside its limits).
For comp mode, set the ALERT
 configuration bit (Bit 3)
of Configuration Register 1 (Address 0x01) to1.
In comp mode, the ALERT
 output is automatically pulled
low when a measurement goes outside its programmed limits.
Once the measurement falls back within its limits (and
assuming no other measurement channel is outside its limits),
the ALERT
 output is automatically pulled high again.
The main difference between the two modes is that the
SMBusALERT
 does not reset without software intervention,
whereas the comp mode ALERT
 output automatically resets.
Figure 30. ALERT
 Comparator and SMBusALERT
Outputs
TEMPERATURE
LIMITS
TIME
CLEARED
ON READ
SMBusALERT
ALERT
 COMP
ALERT
, 705C
Handling SMBusALERT
 Interrupts
To prevent tie-ups due to service interrupts, follow these
steps:
1. Detect an SMBus assertion.
2. Enter the interrupt handler.
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