參數(shù)資料
型號(hào)： ADP5041ACPZ-1-R7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 1/40頁(yè)
文件大?。?/td> 3581K
描述： IC REG TRPL BCK/LINEAR 20-LFCSP
標(biāo)準(zhǔn)包裝： 1
拓?fù)洌?/td> 降壓（降壓）同步（1），線性（LDO）（2）
功能： 任何功能
輸出數(shù)： 3
頻率 - 開(kāi)關(guān)： 3MHz
電壓/電流 - 輸出 1： 0.8 V ~ 3.8 V，1.2A
電壓/電流 - 輸出 2： 0.8 V ~ 5.2 V，300mA
電壓/電流 - 輸出 3： 0.8 V ~ 5.2 V，300mA
帶 LED 驅(qū)動(dòng)器： 無(wú)
帶監(jiān)控器： 是
帶序列發(fā)生器： 無(wú)
電源電壓： 2.3 V ~ 5.5 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 20-WFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 20-LFCSP-WQ（4x4）
包裝： 標(biāo)準(zhǔn)包裝
其它名稱： ADP5041ACPZ-1-R7DKR
 
Micro PMU with 1.2 A Buck, Two 300 mA LDOs,
Supervisory, Watchdog, and Manual Reset
Data Sheet
ADP5041
 
 
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
 
 
 
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com 
Fax: 781.461.3113
?SPAN class="pst ADP5041ACPZ-1-R7_2473529_0">2011 Analog Devices, Inc. All rights reserved.
FEATURES
Input voltage range: 2.3 V to 5.5 V
One 1.2 A buck regulator
Two 300 mA LDOs
20-lead, 4 mm ?4 mm LFCSP package
Overcurrent and thermal protection
Soft start
Undervoltage lockout
Open-drain processor reset with externally adjustable
threshold monitoring
Guaranteed reset output valid to VAVIN = 1 V
Manual reset input
Watchdog refresh input
Buck key specifications
Output voltage range: 0.8 V to 3.8 V
Current mode topology for excellent transient response
3 MHz operating frequency
Peak efficiency up to 96%
Uses tiny multilayer inductors and capacitors
Mode pin selects forced PWM or auto PWM/PSM mode
100% duty cycle low dropout mode
LDOs key specifications
Output voltage range: 0.8 V to 5.2 V
Low input supply voltage from 1.7 V to 5.5 V
Stable with 2.2 糉 ceramic output capacitors
High PSRR
Low output noise
Low dropout voltage
40癈 to +125癈 junction temperature range
FUNCTIONAL BLOCK DIAGRAM
SW
EN_BK
FB2
R4
R4
R5
R3
FB3
R3
R7
C5
2.2礔
C6
2.2礔
VOUT2
AVIN
VBIAS
VBIAS
VOUT1
FB1
L1
1礖
R1
R2
V
IN1
 = 2.3V TO
5.5V
C1
4.7礔
SUPERVISOR
礟
nRSTO
WDI
VTHR
MR
R
FILT
= 30&
V
IN2
 = 1.7V
TO 5.5V
VIN1
ON
OFF
ON
OFF
ON
OFF
EN1
VIN2
C2
1礔
C3
1礔
EN2
EN3
VIN3
V
IN3
 = 1.7V
TO 5.5V
EN_LDO2
LDO2
(ANALOG)
BUCK
AGND
V
OUT1
 AT
1.2A
C6
10礔
PGND
FPWM
PSM/PWM
MODE
V
OUT2
 AT
300mA
V
OUT3
 AT
300mA
VOUT3
LDO1
(DIGITAL)
EN_LDO1
 
Figure 1.
GENERAL DESCRIPTION
The ADP5041 combines one high performance buck regulator
and two low dropout regulators (LDO) in a small 20-lead
LFCSP to meet demanding performance and board space
requirements.
The high switching frequency of the buck regulator enables
use of tiny multilayer external components and minimizes
board space.
When the MODE pin is set to logic high, the buck regulator
operates in forced PWM mode. When the MODE pin is set to
logic low, the buck regulator operates in PWM mode when the
load is around the nominal value. When the load current falls
below a predefined threshold, the regulator operates in power
save mode (PSM), improving the light load efficiency. The low
quiescent current, low dropout voltage, and wide input voltage
range of the ADP5041 LDOs extend the battery life of portable
devices. The ADP5041 LDOs maintain a power supply rejection
greater than 60 dB for frequencies as high as 10 kHz while
operating with a low headroom voltage.
Each regulator in the ADP5041 is activated by a high level on
the respective enable pin. The output voltages of the regulators
and the reset threshold are programmed through external resistor
dividers to address a variety of applications. The ADP5041
contains supervisory circuits that monitor power supply voltage
levels and code execution integrity in microprocessor-based
systems. They also provide power-on reset signals. An on-chip
watchdog timer can reset the microprocessor if it fails to strobe
within a preset timeout period.
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