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參數(shù)資料
| 型號： | ADM1029ARQZ-R7 |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 46/50頁 |
| 文件大?。?/td> | 402K |
| 描述： | IC SENSOR 2TEMP/FAN CTRL 24QSOP |
| 產(chǎn)品變化通告： | QSOP 24ld Pkg (MSL) Change 17/Jun/2010 |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 功能： | 風(fēng)扇控制，溫度監(jiān)控器 |
| 傳感器類型： | 內(nèi)部和外部 |
| 感應(yīng)溫度： | 0°C ~ 100°C，外部傳感器 |
| 精確度： | ±1°C 本地，±3°C 遠(yuǎn)程 |
| 拓?fù)洌?/td> | ADC，風(fēng)扇控制，寄存器庫 |
| 輸出類型： | 開路漏極 |
| 輸出警報： | 是 |
| 輸出風(fēng)扇： | 是 |
| 電源電壓： | 3 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 100°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SSOP（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 24-QSOP |
| 包裝： | 帶卷 (TR) |
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ADM1029
http://onsemi.com
46
Table 51. REGISTER 28H, 29H, 2AH, 2BH, 2CH, 2DH, 2EH GPIOX* BEHAVIOR (POWER-ON DEFAULT 00H)
Bit
Name
R/W
Description
0
Direction = 0
R/W
This bit indicates the direction for GPIOx* pin. When set to 1 GPIOx* will
function as an input, when 0 GPIOx* will function as an output.
1
Polarity = 0
R/W
This bit indicates the polarity of the GPIOx* pin. When set to 1 GPIOx* will be
active high, when 0 GPIOx* will be active low.
2
Bit 2 = 0
R/W
If GPIOx* is configured as an input, CFAULT
will be asserted if GPIOx* pin is
asserted while this bit is set. If GPIO2 is configured as an output, GPIO2 will be
asserted if a temperature High limit is exceeded while this bit is set. If automatic
fan speed control is enabled, this bit will be set by default. This can be used as
a SHUTDOWN signal for a catastrophic overtemperature event.
3
Bit 3 = 0
R/W
If GPIOx* is configured as an input, INT
will be asserted if GPIOx* pin is
asserted while this bit is set. If GPIOx* is configured as an output, GPIOx* will
be asserted if a temperature Low limit is exceeded while this bit is set.
4
Bit 4 = 0
R/W
If GPIOx* is configured as an input, Fans will go to Alarm Speed if GPIOx* pin
is asserted while this bit is set. If GPIOx* is configured as an output, GPIOx*
will be asserted if a Fan Tach limit is exceeded while this bit is set.
5
Bit 5 = 0
R/W
If GPIOx* is configured as an input, Fans will go to Hot-plug Speed if GPIOx*
pin is asserted while this bit is set. If GPIOx* is configured as an output,
GPIOx* will be asserted if a Fan Fault (Pins 2/23) is detected while this bit is
set.
6
Bit 6 = 0
R
R/W
If GPIOx* is configured as an input, this bit will reflect state of GPIOx* pin.
If GPIOx* is configured as an output, GPIOx will be asserted if an AIN high
limit is exceeded while this bit is set.
7
Bit 7 = 0
R/W
If GPIOx* is configured as an input, this bit will latch a GPIOx* assertion
event. This bit is cleared by writing a 0 to it. If GPIOx* is configured as an
output, GPIOx* will be asserted if an AIN Low limit is exceeded while this bit is
set.
* x denotes the number of the GPIO pin. Register 28h controls GPIO0, 29h controls GPIO1, etc.
Table 52. REGISTER 38H, 39H, 3AH, 3BH, 3CH, 3DH, 3EH GPIOX* EVENT MASK (POWER-ON DEFAULT 00H)
Bit
Name
R/W
Description
0
Fan 1 = 0
R/W
If GPIOx* is asserted such that fans should be driven at Alarm or Hot-plug
Speed, Fan 1 will be set to this speed when this bit is set.
1
Fan 2 = 0
R/W
If GPIOx* is asserted such that fans should be driven at Alarm or Hot-plug
Speed, Fan 2 will be set to this speed when this bit is set.
2
Reserved
R
Unused. Will read back 0.
3
Reserved
R
Unused. Will read back 0.
4
Reserved
R
Unused. Will read back 0.
5
Reserved
R
Unused. Will read back 0.
6
Reserved
R
Unused. Will read back 0.
7
Reserved
R
Unused. Will read back 0.
* x denotes the number of the GPIO pin. Register 38h is for GPIO0, 39h is for GPIO1 etc.
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