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參數(shù)資料
| 型號(hào)： | ADM1024EVB |
| 廠商： | ON Semiconductor |
| 文件頁(yè)數(shù)： | 2/30頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADM1024 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 其它名稱： | EVAL-ADM1024EB EVAL-ADM1024EB-ND |
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ADM1024
http://onsemi.com
10
the serial bus address, R/W bit set to 1, followed
by the data byte read from the data register. This is
shown in Figure 12.
2. If the Address Pointer Register is known to be
already at the desired address, data can be read
from the corresponding data register without first
writing to the Address Pointer Register, so
Figure 11 can be omitted.
Figure 10. Writing a Register Address to the Address Pointer Register,
then Writing Data to the Selected Register
0
SCL
SDA
10
1
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
1
9
SCL (CONTINUED)
SDA (CONTINUED)
ACK. BY
ADM1024
ACK. BY
ADM1024
ACK. BY
ADM1024
START BY
MASTER
STOP BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
FRAME 3
DATA BYTE
D1
D2
D3
D4
D5
D6
D7
R/W
1
9
91
Figure 11. Writing to the Address Pointer Register Only
STOP BY
MASTER
D0
1
9
D1
D2
D3
D4
D5
D6
D7
0
SCL
SDA
1
0
1
A1
A0
ACK. BY
ADM1024
ACK. BY
ADM1024
START BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
R/W
19
Figure 12. Reading Data from a Previously Selected Register
STOP BY
MASTER
1
9
SCL
ACK. BY
ADM1024
START BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
19
R/W
0
1
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
0
1
SDA
NO ACK.
BY MASTER
FRAME 2
DATA BYTE FROM ADM1024
NOTES
1. Although it is possible to read a data byte from a
data register without first writing to the Address
Pointer Register, if the Address Pointer Register is
already at the correct value, it is not possible to
write data to a register without writing to the
Address Pointer Register because the first data
byte of a write is always written to the Address
Pointer Register.
shown as the default value 01011(A1)(A0), where
A1 and A0 are set by the threestate ADD pin.
Measurement Inputs
The ADM1024 has nine external measurement pins that can
be configured to perform various functions by programming
the Channel Mode Register.
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