參數(shù)資料
型號： ADM1024EVB
廠商： ON Semiconductor
文件頁數(shù)： 19/30頁
文件大?。?/td> 0K
描述： BOARD EVAL FOR ADM1024
標(biāo)準(zhǔn)包裝： 1
其它名稱： EVAL-ADM1024EB
EVAL-ADM1024EB-ND
ADM1024
http://onsemi.com
26
Table 11. LIST OF REGISTERS
Hex
Addr
Notes
Power-on Value
(Binary Bit 70)
Description
34h
12 V Low Limit
Indeterminate
35h
VCCP2 High Limit
Indeterminate
36h
VCCP2 Low Limit
Indeterminate
37h
Ext. Temp1 High Limit
Indeterminate
Stores high limit for a diode sensor connected to Pins 13 and 14.
38h
Ext. Temp1 Low Limit
Indeterminate
Stores low limit for a diode sensor connected to Pins 13 and 14.
39h
Internal Temp. High Limit
Indeterminate
Stores the high limit for the internal temperature reading.
3Ah
Internal Temp. Low Limit
Indeterminate
Stores the low limit for the internal temperature reading.
3Bh
AIN1/FAN1 High Limit
Indeterminate
Stores high limit for AIN1 or FAN1, depending on the configuration of
Pin 5.
3Ch
AIN2/FAN2 High Limit
Indeterminate
Stores high limit for AIN2 or FAN2, depending on the configuration of
Pin 6.
3Dh
Reserved
Indeterminate
3Eh
Company ID Number
0100 0001
This location will contain the company identification number (Read
Only).
3Fh
Revision Number
0001 nnnn
Last four bits of this location will contain the revision number of the
part (Read Only).
40h
Configuration Register 1
0000 1000
See Table 10
41h
Interrupt INT Status Register 1
0000 0000
See Table 11
42h
Interrupt INT Status Register 2
0000 0000
See Table 12
43h
INT Mask Register 1
0000 0000
See Table 13
44h
INT Mask Register 2
0000 0000
See Table 14
46h
Chassis Intrusion Clear Register
0000 0000
See Table 15
47h
VID0–3/Fan Divisor Register
0101 (VID3–VID0)
See Table 16
49h
VID4 Register
1000 000 (VID4)
See Table 17
4Ah
Configuration Register 2
0000 0000
See Table 18
4Ch
Interrupt Status Register Mirror 1
0000 0000
See Table 19
4Dh
Interrupt Status Register Mirror 2
0000 0000
See Table 20
Table 12. REGISTER 16H, CHANNEL MODE REGISTER (POWER-ON DEFAULT, 00H)
Bit
Name
R/W
Description
0
FAN1/AIN1
R/W
Clearing this bit to 0 configures Pin 5 as FAN1 input. Setting this bit to 1 configures
Pin 5 as AIN1. Poweron default = 0.
1
FAN2/AIN2
R/W
Clearing this bit to 0 configures Pin 6 as FAN2 input. Setting this bit to 1 configures
Pin 6 as AIN2. Poweron default = 0.
2
2.5 V, VCCP2/D2
R/W
Clearing this bit to 0 configures Pins 17 and 18 to measure VCCP2 and 2.5 V. Setting
this bit to 1 configures Pins 17 and 18 as an input for a second remote
temperaturesensing diode. Poweron default = 0.
3
Int. VCC
R/W
Clearing this bit to 0 sets the measurement range for the internal VCC measurement
to 3.3 V. Setting this bit to 1 sets the internal VCC measurement range to 5.0 V.
Poweron default = 0.
4
IRQ0 EN
R/W
Setting this bit to 1 enables Pin 24 as an active high interrupt input, provided Pins 20
to 24 have been configured as interrupts by setting Bit 7 of the Channel Mode
Register. Poweron default = 0.
5
IRQ1 EN
R/W
Setting this bit to 1 enables Pin 23 as an active high interrupt input, provided Pins 20
to 24 have been configured as interrupts by setting Bit 7 of the Channel Mode
Register. Poweron default = 0.
6
IRQ2 EN
R/W
Setting this bit to 1 enables Pin 22 as an active high interrupt input, provided Pins 20
to 24 have been configured as interrupts by setting Bit 7 of the Channel Mode
Register. Poweron default = 0.
7
VID/IRQ
R/W
Clearing this bit to 0 configures Pins 20 to 24 as processor voltage ID inputs. Setting
this bit to 1 configures Pins 20 to 24 as interrupt inputs. Poweron default = 0.
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