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參數(shù)資料
| 型號(hào)： | AD9980KSTZ-95 |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 18/44頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC INTERFACE 8BIT ANALOG 80LQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 應(yīng)用： | 視頻 |
| 接口： | 模擬 |
| 電源電壓： | 3.13 V ~ 3.47 V |
| 封裝/外殼： | 80-LQFP |
| 供應(yīng)商設(shè)備封裝： | 80-LQFP（14x14） |
| 包裝： | 管件 |
| 安裝類(lèi)型： | 表面貼裝 |
| 配用： | AD9980/PCBZ-ND - KIT EVALUATION AD9980 |
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AD9980
Rev. 0 | Page 25 of 44
Hexadecimal
Address
Read and
Write or
Read Only
Bits
Default
Value
Register
Name
Description
5
**1* ****
Programmable Bandwidth.
0 = Low analog input bandwidth.
1 = High analog input bandwidth.
4
***1 ****
Power-Down Control Select.
0 = Manual power-down control.
1 = Auto power-down control.
3
**** 0***
Power-Down.
0 = Normal operation.
1 = Power-down.
2
**** *0**
Power-Down Pin Polarity.
0 = Active low.
1 = Active high.
1
**** **0*
Power-Down Fast Switching Control.
0 = Normal power-down operation.
1 = The chip stays powered up and the outputs are put in high
impedance mode.
0
**** ***0
SOGOUT High Impedance Control.
0 = SOGOUT operates as normal during power-down.
1 = SOGOUT is in high impedance during power-down.
0x1F
R/W
6:5
*00* ****
Output
Select 1
Output Mode.
00 = 4:4:4 output mode.
01 = 4:2:2 output mode.
10 = 4:4:4 – DDR output mode.
4
***1 ****
Primary Output Enable.
0 = Primary output is in high impedance state.
1 = Primary output is enabled.
3
**** 0***
Secondary Output Enable.
0 = Secondary output is in high impedance state.
1 = Secondary output is enabled.
2:1
**** *10*
Output Drive Strength.
00 = Low output drive strength.
01 = Medium low output drive strength.
10 = Medium high output drive strength.
11 = High output drive strength.
Applies to all outputs except VSOUT.
0
**** ***0
Output Clock Invert.
0 = Noninverted Pixel Clock.
1 = Inverted Pixel Clock.
Applies to all clocks output on DATACK.
0x20
R/W
7:6
00** ****
Output
Select 2
Output Clock Select.
00 = Pixel clock.
01 = 90° phase shifted pixel clock.
10 = 2× pixel clock.
11 = 40 MHz internal clock.
5
**0* ****
Output High Impedance.
0 = Normal outputs.
1 = All outputs except SOGOUT in high impedance mode.
4
***0 ****
SOG High Impedance.
0 = Normal SOG output
1 = SOGOUT pin is in high impedance mode.
3
**** 1***
Field Output Polarity.
Sets the polarity of the field output signal.
0 = Active low => even field, active high => odd field.
1 = Active low => odd field, active high => even field.
2
**** *0**
PLL Sync Filter Enable.
0 = PLL uses raw Hsync/SOG.
1 = PLL uses filtered Hsync/SOG.
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