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參數(shù)資料
| 型號： | AD9952YSVZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 26/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DDS 14BIT DAC 1.8V 48-TQFP |
| 產品培訓模塊： | Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 標準包裝： | 1 |
| 分辨率（位）： | 14 b |
| 主 fclk： | 400MHz |
| 調節(jié)字寬（位）： | 32 b |
| 電源電壓： | 1.71 V ~ 1.96 V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-TQFP 裸露焊盤 |
| 供應商設備封裝： | 48-TQFP 裸露焊盤（7x7） |
| 包裝： | 托盤 |
| 產品目錄頁面： | 552 (CN2011-ZH PDF) |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁當前第26頁第27頁第28頁
AD9952
Rev. B | Page 7 of 28
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
S
CL
K
S
D
IO
S
D
O
C
S
3
4
8
9
1
36
35
34
33
32
31
30
29
28
7
6
2
5
10
11
12
25
26
27
37
41
42
43
44
45
46
47
48
DACB
P
AG
N
D
IOU
T
IOU
T
AV
D
AG
N
D
AV
D
AV
D
AV
D
AG
N
D
AG
N
D
AGND
AVDD
COMP_OUT
COMP_IN
DG
N
D
DGND
DVDD
PWRDWNCTL
RESET
IO
SY
N
C
DV
DD_I
/O
S
Y
NC_I
N
S
Y
NC_CL
K
OS
K
DG
ND
DG
N
D
I/O UPDATE
DVDD
DGND
AVDD
AGND
AVDD
AGND
REFCLK
CRYSTAL OUT
CLKMODESELECT
LOOP_FILTER
AD9952
TOP VIEW
(Not to Scale)
40
39
38
DAC_
R
SE
T
13
14
15
16
17
18
19
20
21
22
23
24
03358-
002
Figure 2. Pin Configuration
Note that the exposed paddle on the bottom of the package is a ground connection for the DAC and must be attached to AGND in
any board layout. Note that Pin 43, DVDD_I/O, can be powered to 1.8 V or 3.3 V; however, the DVDD pins (Pin 2 and Pin 34) can
only be powered to 1.8 V.
Table 3. 48-Lead TQFP/EP
Pin No.
Mnemonic
I/O
Description
1
I/O UPDATE
I
The rising edge transfers the contents of the internal buffer memory to the I/O registers. This pin
must be set up and held around the SYNC_CLK output signal.
2, 34
DVDD
I
Digital Power Supply Pins (1.8 V).
3, 33, 42,
47, 48
DGND
I
Digital Power Ground Pins.
4, 6, 13,
16, 18, 19,
25, 27, 29
AVDD
I
Analog Power Supply Pins (1.8 V).
5, 7, 14,
15, 17, 22,
26, 32
AGND
I
Analog Power Ground Pins.
8
REFCLK
I
Complementary Reference Clock/Oscillator Input. When the REFCLK port is operated in single-
ended mode, REFCLK should be decoupled to AVDD with a 0.1 F capacitor.
9
REFCLK
I
Reference Clock/Oscillator Input. See the Clock Input section for details on the oscillator/REFCLK
operation.
10
CRYSTAL OUT
O
Output of the Oscillator Section.
11
CLKMODESELECT
I
Control Pin for the Oscillator Section. When high, the oscillator section is enabled. When low, the
oscillator section is bypassed.
12
LOOP_FILTER
I
This pin provides the connection for the external zero compensation network of the REFCLK
multiplier’s PLL loop filter. The network consists of a 1 k resistor in series with a 0.1 F capacitor
tied to AVDD.
20
IOUT
O
Complementary DAC Output. Should be biased through a resistor to AVDD, not AGND.
21
IOUT
O
DAC Output. Should be biased through a resistor to AVDD, not AGND.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9952YSVZ | 制造商:Analog Devices 功能描述:IC DDS 400MSPS SMD 9952 TQFP48 |
| AD9952YSVZ-REEL7 | 功能描述:IC DDS DAC 14BIT 1.8V 48TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產品變化通告:Product Discontinuance 27/Oct/2011 標準包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:帶卷 (TR) |
| AD9953 | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MSPS 14-Bit, 1.8V CMOS Direct Digital Synthesizer |
| AD9953/PCB | 制造商:Analog Devices 功能描述:400 MSPS, 14BIT DGTL SYNTHESIZER - Bulk |
| AD9953ASV | 制造商:AD 制造商全稱:Analog Devices 功能描述:400 MSPS 14-Bit, 1.8V CMOS Direct Digital Synthesizer |
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