參數(shù)資料
型號(hào)： AD9772AASTZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 16/40頁(yè)
文件大?。?/td> 0K
描述： IC DAC 14BIT 160MSPS 48-LQFP
產(chǎn)品培訓(xùn)模塊： DAC Architectures
標(biāo)準(zhǔn)包裝： 1
系列： TxDAC+®
設(shè)置時(shí)間： 11ns
位數(shù)： 14
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 272mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-LQFP
供應(yīng)商設(shè)備封裝： 48-LQFP（7x7）
包裝： 托盤
輸出數(shù)目和類型： 2 電流，單極；2 電流，雙極
采樣率（每秒）： 160M
產(chǎn)品目錄頁(yè)面： 785 (CN2011-ZH PDF)
AD9772A
Rev. C | Page 23 of 40
1.2V REF
REFIO
FSADJ
CURRENT
SOURCE
ARRAY
250pF
REFLO
AVDD
AD9772A
2k
0.1F
ADDITIONAL
LOAD
OPTIONAL
EXTERNAL
REF BUFFER
2.7V TO 3.6V
02
253-
03
8
Figure 38. Internal Reference Configuration
The internal reference can be disabled by connecting REFLO to
AVDD. In this case, an external 1.2 V reference, such as the
AD1580, can be applied to REFIO as shown in Figure 39. The
external reference can provide either a fixed reference voltage to
enhance accuracy and drift performance or a varying reference
voltage to improve gain control. Note that the 0.1 μF compensation
capacitor is not required because the internal reference is disabled
and the high input impedance of REFIO minimizes any loading
of the external reference.
+1.2V REF
REFIO
FSADJ
CURRENT
SOURCE
ARRAY
250pF
REFLO
AVDD
AD9772A
AD1580
2.7V TO 3.6V
REFERENCE
CONTROL
AMPLIFIER
RSET
IREF =
VREFIO/RSET
10k
VREFIO
022
53-
039
Figure 39. External Reference Configuration
REFERENCE CONTROL AMPLIFIER
The AD9772A also contains an internal control amplifier that is
used to regulate the DAC’s full-scale output current, IOUTFS. The
control amplifier is configured as a V-I converter, as shown in
Figure 39, such that its current output, IREF, is determined by the
ratio of the VREFIO and an external resistor, RSET, as stated in
Equation 4. IREF is copied to the segmented current sources with
the proper scaling factor to set IOUTFS as stated in Equation 3.
The control amplifier allows a wide (10:1) adjustment span of
IOUTFS over a 2 mA to 20 mA range by setting IREF between
62.5 μA and 625 μA. The wide adjustment span of IOUTFS pro-
vides several application benefits. The first benefit relates
directly to the power dissipation of the AD9772A DAC, which
is proportional to IOUTFS (see the Power Dissipation section).
The second benefit relates to the 20 dB adjustment, which is
useful for system gain control purposes.
IREF can be controlled using the single-supply circuit shown in
Figure 40 for a fixed RSET. In this example, the internal refer-
ence is disabled, and the voltage of REFIO is varied over its
compliance range of 1.25 V to 0.10 V. REFIO can be driven by a
single-supply DAC or digital potentiometer, thus allowing IREF
to be digitally controlled for a fixed RSET. This particular example
shows the AD5220, an 8-bit serial input digital potentiometer,
along with the AD1580 voltage reference. Note that because the
input impedance of REFIO does interact with and load the
digital potentiometer wiper to create a slight nonlinearity in the
programmable voltage divider ratio, a digital potentiometer
with 10 kΩ or less resistance is recommended.
1.2V REF
REFIO
FSADJ
CURRENT
SOURCE
ARRAY
250pF
REFLO
AVDD
AD9772A
AD1580
2.7V TO 3.6V
RSET
10k
AD5220
1.2V
02
25
3-
04
0
Figure 40. Single-Supply Gain Control Circuit
ANALOG OUTPUTS
The AD9772A produces two complementary current outputs,
IOUTA and IOUTB, which can be configured for single-ended or
differential operation. IOUTA and IOUTB can be converted into
complementary single-ended voltage outputs, V
B
OUTA
and VOUTB,
via a load resistor, RLOAD, as described in the
section, by using Equation 5 through Equation 8. The
differential voltage, V
DIFF
, existing between VOUTA and VOUTB, can
also be converted to a single-ended voltage via a transformer or
differential amplifier configuration.
Figure 41 shows the equivalent analog output circuit of the
AD9772A, which consists of a parallel combination of PMOS
differential current switches associated with each segmented
current source. The output impedance of IOUTA and IOUTB is
determined by the equivalent parallel combination of the PMOS
switches and is typically 200 kΩ in parallel with 3 pF. Due to the
nature of a PMOS device, the output impedance is also slightly
dependent on the output voltage (that is, V
B
OUTA
and VOUTB) and,
to a lesser extent, the analog supply voltage, AVDD, and full-
scale current, IOUTFS. Although the signal dependency of the
output impedance can be a source of dc nonlinearity and ac
linearity (that is, distortion), its effects can be limited if certain
precautions are taken.
AD9772A
AVDD
IOUTA
RLOAD
IOUTB
02
25
3-
0
41
Figure 41. Equivalent Analog Output Circuit
IOUTA and IOUTB also have a negative and positive voltage
compliance range. The negative output compliance threshold
of 1.0 V is set by the breakdown limits of the CMOS process.
Operation beyond this maximum limit may result in a breakdown
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9772AASTZRL 功能描述:IC DAC 14BIT 160MSPS 48LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC+® 產(chǎn)品培訓(xùn)模塊:Data Converter Fundamentals DAC Architectures 標(biāo)準(zhǔn)包裝:750 系列:- 設(shè)置時(shí)間:7µs 位數(shù):16 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 電壓電源:雙 ± 功率耗散（最大）:100mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-LCC（J 形引線） 供應(yīng)商設(shè)備封裝:28-PLCC（11.51x11.51） 包裝:帶卷 (TR) 輸出數(shù)目和類型:1 電壓，單極；1 電壓，雙極 采樣率（每秒）:143k
AD9772A-EB 制造商:Analog Devices 功能描述:14 BIT DAC W/2X INTERPOLATION 制造商:Analog Devices 功能描述:DEV TOOLS, EVAL BD FOR AD9772A - Bulk
AD9772A-EBZ 功能描述:BOARD EVAL FOR AD9772A RoHS:是 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估板 - 數(shù)模轉(zhuǎn)換器 (DAC) 系列:TxDAC+® 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- DAC 的數(shù)量:4 位數(shù):12 采樣率（每秒）:- 數(shù)據(jù)接口:串行，SPI? 設(shè)置時(shí)間:3µs DAC 型:電流/電壓 工作溫度:-40°C ~ 85°C 已供物品:板 已用 IC / 零件:MAX5581
AD9772AST 制造商:Rochester Electronics LLC 功能描述:14 BIT DAC W/2X INTERPOLA - Tape and Reel
AD9772EB 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 160 MSPS TxDAC+ with 2x Interpolation Filter
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