參數(shù)資料
型號: AD9644CCPZ-80
廠商: Analog Devices Inc
文件頁數(shù): 34/44頁
文件大?。?/td> 0K
描述: IC ADC 14BIT 80MSPS 3V 48LFCSP
標準包裝: 1
位數(shù): 14
采樣率(每秒): 80M
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 460mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 48-LFCSP-VQ(7x7)
包裝: 托盤
輸入數(shù)目和類型: 2 個差分,雙極
AD9644
Data Sheet
Rev. C | Page 4 of 44
SPECIFICATIONS
ADC DC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, 1.75 V p-p differential input, VIN = 1.0 dBFS differential input, DCS enabled,
unless otherwise noted.
Table 1.
AD9644-80
AD9644-155
Parameter
Temperature
Min
Typ
Max
Min
Typ
Max
Unit
RESOLUTION
Full
14
Bits
ACCURACY
No Missing Codes
Full
Guaranteed
Offset Error
Full
±2
±10
±2.2
±11
mV
Gain Error
Full
7
2.5
+1
6
1.5
+4
% FSR
Differential Nonlinearity (DNL)1
Full
±0.55
LSB
25°C
±0.3
LSB
Integral Nonlinearity (INL)1
Full
±1.1
±1.25
LSB
25°C
±0.5
±0.55
LSB
MATCHING CHARACTERISTIC
Offset Error
Full
7
+1.5
+10
6
+1.5
+9
mV
Gain Error
Full
1.5
+0.6
+2.75
3.1
+0.75
+5
% FSR
TEMPERATURE DRIFT
Offset Error
Full
±2
ppm/°C
Gain Error
Full
±35
±144
ppm/°C
INPUT REFERRED NOISE
25°C
0.7
LSB rms
ANALOG INPUT
Input Span
Full
1.383
1.75
2.087
1.383
1.75
2.087
V p-p
Input Capacitance2
Full
7
5
pF
Input Resistance
Full
20
k
VCM OUTPUT LEVEL
Full
0.88
0.9
0.92
0.87
0.9
0.93
V
POWER SUPPLIES
Supply Voltage
AVDD
Full
1.7
1.8
1.9
1.7
1.8
1.9
V
DRVDD
Full
1.7
1.8
1.9
1.7
1.8
1.9
V
Supply Current
IAVDD1
Full
175
190
226
242
mA
IDRVDD1
Full
60
67
89
97
mA
POWER CONSUMPTION
Sine Wave Input1
Full
423
460
567
610
mW
Standby Power3
Full
85
168
mW
Power-Down Power
Full
15
27
18
27
mW
1
Measured with a low input frequency, full-scale sine wave.
2
Input capacitance refers to the effective capacitance between one differential input pin and AGND.
3
Standby power is measured with a dc input and with the CLK pins inactive (set to AVDD or AGND).
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