
Octal LNA/VGA/AAF/ADC
and Crosspoint Switch
AD9273
Rev. B
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FEATURES
8 channels of LNA, VGA, AAF, and ADC
Low noise preamplifier (LNA)
Input-referred noise voltage = 1.26 nV/√Hz
(gain = 21.3 dB) @ 5 MHz typical
SPI-programmable gain = 15.6 dB/17.9 dB/21.3 dB
Single-ended input; VIN maximum = 733 mV p-p/
550 mV p-p/367 mV p-p
Dual-mode active input impedance matching
Bandwidth (BW) > 100 MHz
Full-scale (FS) output = 4.4 V p-p differential
Variable gain amplifier (VGA)
Attenuator range = 42 dB to 0 dB
SPI-programmable PGA gain = 21 dB/24 dB/27 dB/30 dB
Linear-in-dB gain control
Antialiasing filter (AAF)
Programmable 2nd-order low-pass filter (LPF) from
8 MHz to 18 MHz
Programmable high-pass filter (HPF)
Analog-to-digital converter (ADC)
12 bits at 10 MSPS to 50 MSPS
SNR = 70 dB
SFDR = 75 dB
Serial LVDS (ANSI-644, IEEE 1596.3 reduced range link)
Data and frame clock outputs
Includes an 8 × 8 differential crosspoint switch to support
continuous wave (CW) Doppler
Low power, 109 mW per channel at 12 bits/40 MSPS (TGC)
70 mW per channel in CW Doppler
Flexible power-down modes
Overload recovery in <10 ns
Fast recovery from low power standby mode, <2 μs
100-lead TQFP and 144-ball BGA
APPLICATIONS
Medical imaging/ultrasound
Automotive radar
GENERAL DESCRIPTION
The AD9273 is designed for low cost, low power, small size, and
ease of use. It contains eight channels of a low noise preamplifier
(LNA) with a variable gain amplifier (VGA); an antialiasing
filter (AAF); and a 12-bit, 10 MSPS to 50 MSPS analog-to-
digital converter (ADC).
Each channel features a variable gain range of 42 dB, a fully
differential signal path, an active input preamplifier termination, a
maximum gain of up to 52 dB, and an ADC with a conversion
rate of up to 50 MSPS. The channel is optimized for dynamic
performance and low power in applications where a small
package size is critical.
FUNCTIONAL BLOCK DIAGRAM
SER
IA
L
PO
R
T
INT
E
RF
ACE
REFERENCE
FCO+
FCO–
DCO+
DCO–
LNA
LO-H
LOSW-H
LI-H
LG-H
12-BIT
ADC
SERIAL
LVDS
DOUTH+
DOUTH–
LNA
LO-G
LOSW-G
LI-G
LG-G
12-BIT
ADC
SERIAL
LVDS
DOUTG+
DOUTG–
LNA
LO-F
LOSW-F
LI-F
LG-F
12-BIT
ADC
SERIAL
LVDS
DOUTF+
DOUTF–
LNA
LO-E
LOSW-E
LI-E
LG-E
12-BIT
ADC
SERIAL
LVDS
DOUTE+
DOUTE–
LNA
LO-D
LOSW-D
LI-D
LG-D
12-BIT
ADC
SERIAL
LVDS
DOUTD+
DOUTD–
LNA
LO-C
LOSW-C
LI-C
LG-C
12-BIT
ADC
SERIAL
LVDS
DOUTC+
DOUTC–
LNA
LO-B
LOSW-B
LI-B
LG-B
12-BIT
ADC
SERIAL
LVDS
DOUTB+
DOUTB–
LNA
LO-A
LOSW-A
LI-A
LG-A
12-BIT
ADC
SERIAL
LVDS
DOUTA+
DOUTA–
AV
DD1
AV
DD2
ST
B
Y
DRV
DD
PD
W
N
CL
K–
CL
K+
SD
IO
SC
L
K
CS
B
RBI
AS
VR
EF
GA
IN
+
GA
IN
–
CW
D[
7
:0]
+
AND
C
W
D[
7:
0]
–
SWITCH
ARRAY
DAT
A
RAT
E
MU
L
T
IP
L
IER
AAF
AD9273
VGA
070
30-
001
Figure 1.
The LNA has a single-ended-to-differential gain that is selectable
through the SPI. The LNA input-referred noise voltage is typically
1.26 nV/√Hz at a gain of 21.3 dB, and the combined input-referred
noise voltage of the entire channel is 1.42 nV/√Hz at typical
gain. Assuming a 15 MHz noise bandwidth (NBW) and a 21.3 dB
LNA gain, the input SNR is about 91 dB. In CW Doppler mode,
the LNA output drives a transconductance amp that is switched
through an 8 × 8 differential crosspoint switch. The switch is
programmable through the SPI.