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參數(shù)資料
| 型號(hào)： | AD7923BRUZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 4CH W/SEQ 16TSSOP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 200k |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 7.5mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-TSSOP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 輸入數(shù)目和類型： | 4 個(gè)單端，單極 |
| 其它名稱： | AD7923BRUZ-REEL7DKR |
Data Sheet
AD7923
Rev. D | Page 13 of 24
Table 8. Power Mode Selection
PM1
PM0
Mode
1
Normal operation. In this mode, the AD7923 remains in full power mode, regardless of the status of any of the logic inputs.
This mode allows the fastest possible throughput rate from the AD7923.
1
0
Full shutdown. In this mode, the AD7923 is in full shutdown mode with all circuitry on the AD7923 powering down. The
AD7923 retains the information in the control register while in full shutdown. The part remains in full shutdown until these
bits are changed.
0
1
Auto shutdown. In this mode, the AD7923 automatically enters full shutdown mode at the end of each conversion when the
control register is updated. Wake-up time from full shutdown is 1 s, and the user should ensure that 1 s has elapsed
before attempting to perform a valid conversion on the part in this mode.
0
Invalid selection. This configuration is not allowed.
SEQUENCER OPERATION
The configuration of the SEQ1 and SEQ0 bits in the control register allows the user to select a particular mode of operation of the
sequencer function. Table 9 outlines the three modes of operation of the sequencer.
Table 9. Sequence Selection
SEQ1
SEQ0
Sequence Type
0
X
This configuration means that the sequence function is not used. The analog input channel selected for each individual
conversion is determined by the contents of Channel Address Bits ADD1 and ADD0 in each prior write operation. This
mode of operation reflects the traditional operation of a multichannel ADC without the sequencer function being used,
where each write to the AD7923 selects the next channel for conversion (see Figure 11).
1
0
If the SEQ1 and SEQ0 bits are set in this way, the sequence function is not interrupted upon completion of the write
operation. This allows other bits in the control register to be altered between conversions while in a sequence without
terminating the cycle.
1
This configuration is used in conjunction with Channel Address Bits ADD1 and ADD0 to program continuous conversions
on a consecutive sequence of channels from Channel 0 to a selected final channel as determined by the channel address
bits in the control register (see Figure 12).
Figure 11 reflects the traditional operation of a multichannel ADC,
where each serial transfer selects the next channel for conversion.
In this mode of operation the sequencer function is not used.
Figure 12 shows how to program the AD7923 to continuously
convert on a sequence of consecutive channels from Channel 0
to a selected final channel. To exit this mode of operation and
revert back to the traditional mode of operation of a multi-
channel ADC (as outlined in Figure 11), ensure that the write
bit = 1 and SEQ1 = SEQ0 = 0 on the next serial transfer.
POWER-ON
DUMMY CONVERSION
WRITE BIT = 1,
SEQ1 = 0,
SEQ0 = x
CS
03086-011
DIN: WRITE TO CONTROL REGISTER,
WRITE BIT = 1,
SELECT CODING, RANGE, AND POWER MODE.
SELECT CHANNEL A1, A0 FOR CONVERSION.
SEQ1 = 0, SEQ0 = x
DIN: WRITE TO CONTROL REGISTER,
WRITE BIT = 1,
SELECT CODING, RANGE, AND POWER MODE.
SELECT CHANNEL A1, A0 FOR CONVERSION.
SEQ1 = 0, SEQ0 = x
DOUT: CONVERSION RESULT FROM
PREVIOUSLY SELECTED CHANNEL A1, A0
Figure 11. SEQ1 Bit = 0, SEQ0 Bit = X Flowchart
POWER-ON
DUMMY CONVERSION
CS
03086-012
WRITE BIT = 1,
SEQ1 = 1,
SEQ0 = 0
WRITE BIT = 0
DIN: WRITE TO CONTROL REGISTER,
WRITE BIT = 1,
SELECT CODING, RANGE, AND POWER MODE.
SELECT CHANNEL A1, A0 FOR CONVERSION.
SEQ1 = 1, SEQ0 = 1
CONTINUOUSLY CONVERTS ON THE SELECTED
SEQUENCE OF CHANNELS FROM CHANNEL 0 UP
TO AND INCLUDING THE PREVIOUSLY SELECTED
A1, A0 IN THE CONTROL REGISGER
CONTINUOUSLY CONVERTS ON THE SELECTED
SEQUENCE OF CHANNELS BUT WILL ALLOW
RANGE, CODING, ETC., TO CHANGE IN THE CON-
TROL REGISTER WITHOUT INTERRUPTING THE
SEQUENCY, PROVIDED SEQ =1, SEQ0 = 0
DOUT: CONVERSION RESULT FROM CHANNEL 0
Figure 12. SEQ1 Bit = 1, SEQ0 Bit = 1 Flowchart
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