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參數(shù)資料
| 型號： | AD7450BRZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 19/22頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT DIFF IN 1MSPS 8SOIC |
| 標準包裝： | 98 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 1M |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 9.25mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SOIC |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個差分，單極 |
| 配用： | EVAL-AD7450CBZ-ND - BOARD EVALUATION FOR AD7450 |
–6–
AD7450
PIN CONFIGURATION
TOP VIEW
(Not to Scale)
8
7
6
5
1
2
3
4
VREF
VIN+
VIN–
VDD
SCLK
SDATA
CS
GND
AD7450
PIN FUNCTION DESCRIPTION
Pin Number
Mnemonic
Function
1VREF
Reference Input for the AD7450. An external reference must be applied to this input. For a
5 V power supply, the reference is 2.5 V (
±1%), and for a 3 V power supply, the reference is
1.25 V (
±1%) for specified performance. This pin should be decoupled to GND with a
capacitor of at least 0.1
F. See the References section for more details.
2VIN+
Positive Terminal for Differential Analog Input
3VIN–
Negative Terminal for Differential Analog Input
4
GND
Analog Ground. Ground reference point for all circuitry on the AD7450. All analog input
signals and any external reference signal should be referred to this GND voltage.
5
CS
Chip Select. Active low logic input. This input provides the dual function of initiating a
conversion on the AD7450 and framing the serial data transfer.
6
SDATA
Serial Data. Logic output. The conversion result from the AD7450 is provided on this
output as a serial data stream. The bits are clocked out on the falling edge of the SCLK
input. The data stream consists of four leading zeros followed by the 12 bits of conversion
data that is provided MSB first. The output coding is two’s complement.
7
SCLK
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part.
This clock input is also used as the clock source for the AD7450’s conversion process.
8VDD
Power Supply Input. VDD is 3 V (
±10%) or 5 V (±5%). This supply should be decoupled to
GND with a 0.1
F capacitor and a 10 F tantalum capacitor.
Rev. A
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