參數(shù)資料
型號(hào): AD7450BRZ
廠商: Analog Devices Inc
文件頁數(shù): 16/22頁
文件大小: 0K
描述: IC ADC 12BIT DIFF IN 1MSPS 8SOIC
標(biāo)準(zhǔn)包裝: 98
位數(shù): 12
采樣率(每秒): 1M
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 9.25mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 管件
輸入數(shù)目和類型: 1 個(gè)差分,單極
配用: EVAL-AD7450CBZ-ND - BOARD EVALUATION FOR AD7450
AD7450
–3–
Parameter
Conditions/Comments
A Version
B Version
Unit
CONVERSION RATE
Conversion Time
888 ns with an 18 MHz SCLK
16
SCLK Cycles
1.07
s with a 15 MHz SCLK
Track-and-Hold
Sine Wave Input
200
ns max
Acquisition Time
3, 8
Throughput Rate
9
VDD = 5 V
1
MSPS max
VDD = 3 V
833
kSPS max
POWER REQUIREMENTS
VDD
Range: 3 V
± 10%; 5 V ± 5%
3/5
V min/max
IDD
10, 11
Normal Mode (Static)
VDD = 3 V/5 V SCLK; ON or OFF
0.5
mA typ
Normal Mode (Operational)
VDD = 5 V; fSAMPLE = 1 MSPS
1.8
mA max
VDD = 3 V; fSAMPLE = 833 kSPS
1.25
mA max
Full Power-Down Mode
SCLK ON or OFF
1
A max
Power Dissipation
Normal Mode (Operational)
VDD = 5 V; fSAMPLE = 1 MSPS;
9
mW max
1.38 mW typ for 100 KSPS
10
VDD = 3 V; fSAMPLE = 833 kSPS;
3.75
mW max
0.53 mW typ for 100 KSPS
10
Full Power-Down Mode
VDD = 5 V; SCLK ON or OFF
5
W max
VDD = 3 V; SCLK ON or OFF
3
W max
NOTES
1Temperature range is as follows: A and B Versions: –40
°C to +85°C.
2Common-mode voltage. The input signal can be centered on any choice of dc common-mode voltage as long as this value is in the range specified in Figures 8 and 9.
3See Terminology section.
4A 200 mV p-p sine wave, varying in frequency from 1 kHz to 200 kHz is coupled onto V
DD. A 2.2 nF capacitor is used to decouple VDD to GND.
5If the input spans of V
IN+ and VIN– are both VREF, and they are 180
° out of phase, the differential voltage is 2
VREF.
6The AD7450 is functional with a reference input from 100 mV and for V
DD = 5 V, the reference can range up to 3.5 V (see References section).
7The AD7450 is functional with a reference input from 100 mV and for V
DD = 3 V, the reference can range up to 2.2 V (see References section).
8Sample tested @ 25
°C to ensure compliance.
9See Serial Interface section.
10See Power Versus Throughput Rate section.
11Measured with a midscale dc input.
Rev. A
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