參數(shù)資料
型號: AD668AQ
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: 12-Bit Ultrahigh Speed Multiplying D/A Converter
中文描述: PARALLEL, WORD INPUT LOADING, 0.12 us SETTLING TIME, 12-BIT DAC, CDIP24
封裝: 0.300 INCH, SKINNY, CERDIP-24
文件頁數(shù): 3/16頁
文件大小: 602K
代理商: AD668AQ
AD668J/A
Min
AD668K
Min
AD668S
Min
Parameter
Typ
Max
Typ
Max
Typ
Max
Units
AC CHARACTERISTICS
Analog Settling Time
(10% to 120% Step)
to
±
1%
to
±
0.1%
to
±
0.025%
Digital Settling Time
Current
to
±
1%
to
±
0.025%
Voltage (100
Internal R
L
)
3
to 1%
to 0.1%
to 0.025%
Glitch Impulse
4
Peak Amplitude
Total Harmonic Distortion
5
Multiplying Feedthrough Error
6
60
90
120
*
*
*
*
*
*
ns to 1% of FSR
ns to 0.1% of FSR
ns to 0.025% of FSR
30
90
*
*
*
*
ns to 1% of FSR
ns to 0.025% of FSR
50
75
110
350
20
–75
–62
*
*
*
*
*
*
*
*
*
*
*
*
*
*
ns to 1% of FSR
ns to 0.1% of FSR
ns to 0.025% of FSR
pV-sec
% of FSR
dB
dB
FULL-SCALE TRANSITION
2
10% to 90% Rise Time
90% to 10% Fall Time
11
11
*
*
*
*
ns
ns
POWER REQUIREMENTS
+10.8 V to +16.5 V
–10.8 V to –16.5 V
Power Dissipation
PSRR
7
27
7
510
32
9
615
0.05
*
*
*
*
*
*
*
*
mA
–mA
mW
% of FSR/V
TEMPERATURE RANGE
Rated Specification
2
(J, K, S)
Rated Specification (A)
Storage
0
–40
–65
+70
+85
+150
*
*
–55
+125
°
C
°
C
°
C
*
*
*
*
NOTES
*Same as AD668J/A.
1
Measured in I
OUT
mode. Specified at nominal 5 V full-scale reference.
2
Measured in V
OUT
mode, unless otherwise specified. Specified at nominal 5 V
full-scale reference.
3
Total resistance. Refer to Figure 4.
4
At the major carry, driven by HCMOS logic.
5
V
OUT
= 1 V p-p, V
IN
= 10% to 110%, 100 kHz. Digital Input All 1s.
6
V
IN
= 200 mV p-p, 1 MHz Sine Wave. Digital Input all 0s. See Figure 20.
7
Measured at 15 V
±
10% and 12 V
±
10%.
Specifications shown in
boldface
are tested on all producfion units at final elec-
trical test.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM
RATINGS*
V
CC
to REFCOM . . . . . . . . . . . . . . . . . . . . . . . . 0 V to +18 V
V
EE
to REFCOM . . . . . . . . . . . . . . . . . . . . . . . . . .0 V to –18 V
REFCOM to LCOM . . . . . . . . . . . . . . . . . . +100 mV to –10 V
ACOM to LCOM . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
100 mV
THCOM to LCOM . . . . . . . . . . . . . . . . . . . . . . . . . .
±
500 mV
REFCOM to REFIN (1, 2) . . . . . . . . . . . . . . . . . . . . . . . .18 V
I
BPO
to LCOM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
5 V
I
OUT
to LCOM . . . . . . . . . . . . . . . . . . . . . . . . . . . . –5 V to V
TH
Digital Inputs
to THCOM . . . . . . . . . . . . . –500 mV to +7.0 V
REFIN1 to REFIN2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 V
V
TH
to THCOM . . . . . . . . . . . . . . . . . . . . . . –0.7 V to +1.4 V
Logic Threshold Control Input Current . . . . . . . . . . . . . 5 mA
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . .670 mW
Storage Temperature Range
Q (Cerdip) Package . . . . . . . . . . . . . . . . . .–65
°
C to +150
°
C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +175
°
C
Thermal Resistance
θ
JA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +75
°
C/W
θ
JC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +25
°
C/W
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
AD668
REV. A
–3–
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