參數(shù)資料
型號(hào): AD668AQ
廠商: ANALOG DEVICES INC
元件分類: DAC
英文描述: 12-Bit Ultrahigh Speed Multiplying D/A Converter
中文描述: PARALLEL, WORD INPUT LOADING, 0.12 us SETTLING TIME, 12-BIT DAC, CDIP24
封裝: 0.300 INCH, SKINNY, CERDIP-24
文件頁數(shù): 13/16頁
文件大?。?/td> 602K
代理商: AD668AQ
AD668
REV. A
–13–
Figure 18. Small Signal Bandwidth vs. DC Reference Level
Noise Spectrum
Figure 19 shows the noise spectrum of the DAC with all bits on.
The noise floor of –78 dB is just above the noise floor of the in-
strument being used, in part due to the relatively small (1 V)
output signal of the DAC in voltage output mode.
Figure 19. Noise Spectrum
Analog Feedthrough vs. Frequency
Analog feedthrough is a measure of the effective signal at the
DAC output when all bits are off and a full-scale signal is placed
at the analog input. At dc, the feedthrough is a result of analog
input dependent ground drops, predominantly through the lad-
der ground. Good grounding practices will minimize this effect.
At high frequencies, the signal may propagate to the output
through a variety of capacitive paths. Proper shielding and rout-
ing should be implemented to eliminate external coupling be-
tween the analog input and the DAC output node.
Figure 20. Analog Feedthrough vs. Frequency
Reference Channel THD
THD, or total harmonic distortion, is the ratio of the
rootmean-square (rms) sum of the harmonics to the fundamen-
tal and is expressed in dBs. Figure 21 shows the typical THD of
the AD668 reference channel for both large and small signals.
Figure 21. Reference Channel THD vs. Frequency
TRANSIENT PERFORMANCE
High accuracy settling time measurements of less than one hun-
dred nanoseconds are extremely diliicult to make. The conven-
tional analog amplifiers used in oscilloscope front ends,
typically, cannot recover from the overdrive resulting from a
full-scale step in sufficient time. Sampling scopes can track
much quicker rise times but often provide insufficient accuracy
for 12-bit characterization. Data Precision’s new 640 sampling
scope provides a good combination of speed and resolution that
provides just enough performance to measure the AD668’s
performance.
Digital Settling Time
Figure 22 illustrates the typical settling characteristic of the
AD668 to a full-scale change in digital inputs with the analog
input fixed at 100%. The digital driving circuity is shown in
Figure 23. This circuit allows the DAC to be toggled between
any two codes, and so provides an excellent means of character-
izing both settling and glitch performance.
Figure 22. Typical Digital Settling Characteristics
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