Data Sheet
AD650
Rev. E | Page 17 of 20
PHASE-LOCKED LOOP F/V CONVERSION
Although the F/V conversion technique shown in Figure 13 is
quite accurate and uses only a few extra components, it is very
limited in terms of signal frequency response and carrier feed-
through. If the carrier (or input) frequency changes
instantaneously, then the output cannot change very rapidly due
to the integrator time constant formed by CINT and RIN. While it
is possible to decrease the integrator time constant to provide
faster settling of the F-to-V output voltage, the carrier
feedthrough then becomes larger. For signal frequency response
in excess of 2 kHz, a phase-locked F/V conversion technique
such as the one shown in Figure 22 is recommended.
In a phase-locked loop circuit, the oscillator is driven to a
frequency and phase equal to an input reference signal. In
applications such as a synthesizer, the oscillator output
frequency is first processed through a programmable divide by
N before being applied to the phase detector as feedback. Here
the oscillator frequency is forced to be equal to N times the
reference frequency. It is this frequency output that is the
desired output signal and not a voltage. In this case, the AD650
offers compact size and wide dynamic range.
14
13
1
8
6
5
4
2
3
7
9
10
1
2
5
4
3
6
+V
S
V
S
+V
S
AD582
V
S
1000pF
CAP
0.1礔
200k&
10k&
OUTPUT
1k&
1
2
3
4
14
13
12
11
5
10
6
9
7
8
AD7512
V
S
+V
S
CONTROL
INPUT
+5V
INPUT
VOLTAGE
16.9k&
0.5mA
BIPOLAR
OFFSET
1mA
V
S
+IN
IN
+V
S
C
OS
NULL
AD650
COMPARATOR
INPUT
COMPARATOR
FREQUENCY
OUTPUT
DIGITAL
GND
ANALOG
GND
FREQUENCY
OUTPUT
ONE
SHOT
OP
AMP
0.6 VOLT
500&
10礔
0.1礔
51pF
0.1礔
+
10
15V    +15V
GND
1000pF
9
3.6k&
5 VOLTS VFC NORMAL
GND  AUTO ZERO
11
12
8
Figure 21. Autozero Circuit
C
51pF
15pF
R
140k&
71.5k&
590k&
15V
10
12
4
1
2
11
3
13
9
5
AD650
1MHz FULL-SCALE
R
IN
= 16.9k
C
OS
= 51pF
C
INT
= 1000pF
(UNIPOLAR INPUT)
FREQ
OUT
INPUT
CARRIER
VOLTS INPUT
TO AD650
NAND
XOR
1
2
5
4
3
6
G
D
B
S
1/2 7474
1/2 7474
D
1
PR
1
D
2
PR
2
Q
1
Q
2
CLEAR
1
SD211
DMOSFET
D TYPE FLIP FLOP
1
1
F/V
VOLTAGE
OUTPUT
INPUT
CARRIER
CLOCK
1
CLOCK
2
CLEAR
2
AD509
OPAMP
1/4 7400
7486
Figure 22. Phase-Locked Loop F/V Conversion