參數(shù)資料
型號: AD607
廠商: Analog Devices, Inc.
英文描述: Low Power Mixer/AGC/RSSI 3 V Receiver IF Subsystem(低功耗混合器/AGC/RSSI 3V接收器IF子系統(tǒng))
中文描述: 低功耗混合機/自動增益控制/ RSSI的3 V接收機中頻子系統(tǒng)(低功耗混合器/自動增益控制/ RSSI的3V的接收器中頻子系統(tǒng))
文件頁數(shù): 22/24頁
文件大?。?/td> 510K
代理商: AD607
REV. 0
–22–
AD607
If the AD607’s internal AGC detector is used, then the GAIN/
RSSI (Pin 12) becomes an output and the RSSI voltage appears
across C12, which serves as an integrating capacitor. This volt-
age must be monitored by a high impedance (100 k
minimum)
probe. The internal AGC loop holds the IF voltage at IFOP
(Pin 14) at
±
300 mV; in this application, about 6 dB of attenua-
tion is needed between pins IFOP and DMIP to avoid overload-
ing the I and Q demodulators.
Figure 48. Evaluation Board Test Setup
HP 6632A
PROGRAMMABLE
POWER SUPPLY
2.7V–6V
HP 3326
SYNTHESIZED
SIGNAL GENERATOR
10.710 MHz
FLUKE 6082A
SYNTHESIZED
SIGNAL GENERATOR
240 MHz
HP 8656A
SYNTHESIZED
SIGNAL GENERATOR
240.02 MHz
AD607
EVALUATION
BOARD
TEKTRONIX
11402A
OSCILLOSCOPE
WITH 11A32
PLUGIN
HP 8656A
SYNTHESIZED
SIGNAL GENERATOR
229.3 MHz
DATA PRECISION
DVC8200
PROGRAMMABLE
VOLTAGE SOURCE
HP 9920
IEEE CONTROLLER
HP9121
DISK DRIVE
MCL
ZFSC–2–1
COMBINER
IEEE –488 BUS
VPOS
FDIN
I OUTPUT
Q OUTPUT
MGC
LO
RF
Σ
In operation (Figure 48), the AD607 evaluation board draws
about 8.5 mA at midgain (59 dB). Use high impedance probes
to monitor signals from the demodulated I and Q outputs and
the IF output. The MGC voltage should be set such that the
signal level at DMIP does not exceed
±
150 mV; signal levels
above this will overload the I and Q demodulators. The inser-
tion loss between IFOP and DMIP is typically 3 dB if a simple
low-pass filter (R8 and C2) is used and higher if a reverse-
terminated bandpass filter is used.
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