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參數(shù)資料
| 型號： | AD607 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Low Power Mixer/AGC/RSSI 3 V Receiver IF Subsystem(低功耗混合器/AGC/RSSI 3V接收器IF子系統(tǒng)) |
| 中文描述： | 低功耗混合機/自動增益控制/ RSSI的3 V接收機中頻子系統(tǒng)（低功耗混合器/自動增益控制/ RSSI的3V的接收器中頻子系統(tǒng)） |
| 文件頁數(shù)： | 19/24頁 |
| 文件大?。?/td> | 510K |
| 代理商： | AD607 |
AD607
REV. 0
–19–
of current exactly balances the 4.5
μ
A discharge current. (It
makes no difference what the actual value of V
G
is at that point,
since the AGC filter is an integrator.)
Thus, at 20 mV/dB
V
RIPPLE
=
IT
C
=
4.5
μ
A
×
93
ns
1
nF
=
0.42
mV
This corresponds to 0.021 dB, and the ripple will modulate the
gain by that amount over each cycle. The effect of such modula-
tion on the signal is hard to quantify, but it roughly translates to
a 2% amplitude modulation. Also, the gain ripple depends on
the scale factor. For this example, at GREF = 1.23 V and a
16.4 mV/dB scale factor, the gain ripple increases to 0.025 dB.
AGC Charge Time
When the gain is too high, the IF amplifier will be overdriven to
produce a square wave output (roughly) of
±
560 mV. If per-
fectly square and time- and amplitude-symmetric, this would be
sliced at the 300 mV level to generate a current of 76
μ
A/2, or
38
μ
A. After subtracting the 4.5
μ
A, we should have about 33
μ
A.
In fact, the maximum ramp-up current is about 20
μ
A, because
the waveform is not a crisp square wave (and as the loop ap-
proaches equilibrium it is more nearly sinusoidal). Thus, the
ramp-up rate is 20/4.5 = 4.4 times faster than the discharge rate.
In our example, a 1.6 V change will require about 1.5 ms using
C = 1 nF.
Applications Hints
Do not place a resistor from Pin 12 to Ground: The resistor
converts the integrator—ideal for AGC—into a low-pass filter.
An integrator needs no input to sustain a given output; a low-
pass filter does. This “input” is an INCREASED AMPLITUDE
required at IFOP. The AGC loop thus does not level the output
at IFOP.
Reasons for Using a Larger AGC Capacitor
1. In applications where gain modulation may be troublesome,
raise the capacitor from 1 nF to 2.7 nF; the 80 dB slew time
(at 20 mV/dB) is now close to 1 ms.
2. As the IF is lowered, the capacitor must be increased accord-
ingly if gain ripple is to be avoided. Thus, to achieve the
same ripple at 455 kHz requires the 1 nF capacitor to be in-
creased to 0.022
μ
F.
3. In AM applications, the AGC loop must not track the modu-
lation envelope. The objective should be that the gain should
not vary by more than the amount required to introduce, say,
1% THD distortion at the lowest modulation frequency, say,
300 Hz. Note that in AM applications it is the modulation
bandwidth that determines the required AGC filter capaci-
tor, not the IF.
4. In some applications, even slower AGC may be desired than
that required to prevent modulation tracking.
AD607 EVALUATION BOARD
The AD607 evaluation board (Figures 46 and 47) consists of an
AD607, ground plane, I/O connectors, and a 10.7 MHz band-
pass filter. The RF and LO ports are terminated in 50
to
provide a broadband match to external signal generators to al-
low a choice of RF and LO input frequencies. The IF filter is at
10.7 MHz and has 330
input and output terminations; the
board is laid out to allow the user to substitute other filters for
other IFs.
Figure 46. Evaluation Board
FDIN
COM1
PRUP
LOIP
RFLO
RFHI
GREF
MXOP
VMID
IFHI
VPS1
FLTR
IOUT
QOUT
VPS2
DMIP
IFOP
COM2
GAIN
IFLO
AD607
C12
0.1μF
R9
0
C5
1nF
C6
0.1μF
C8
0.1μF
RSSI
IF
Q
I
C1
0.1μF
C310nF
R1
1k
C2 0.1μF
C4
47pF
R2
C15
0.1μF
JUMPER
JUMPER
C16
1nF
R10
4.99k
R11
OPEN
C11
10nF
R8
C13 0
C14 0
R7
R6
C10
1nF
C9
1nF
R5
332
R3
332
R4
0
C7
1nF
VPOS
GND
FDIN
PRUP
LO
RF
R13
50k
R15
50k
VPOS
FDIN
R12
VMID
C17
C18
SHORT
R14
FDIN
MOD FOR LARGE MAGNITUDE
AC COUPLED INPUT
AD607 EVALUATION BOARD
(AS RECEIVED)
R18
R17
VPOS
FDIN
R16
VMID
SC20
C19
ANYTHING
RSOUR19
FDIN
MOD FOR DC COUPLED INPUT
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD607ARS | 功能描述:射頻混合器 LINEAR IF SUBSYSTEM RoHS:否 制造商:NXP Semiconductors 頻率范圍: 轉(zhuǎn)換損失——最大: 工作電源電壓:6 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| AD607ARS-REEL | 功能描述:IC RCVR IF SUBSYSTEM 3V 20-SSOP RoHS:否 類別:RF/IF 和 RFID >> RF 其它 IC 和模塊 系列:- 標準包裝:100 系列:* |
| AD607ARSZ | 功能描述:IC LIN RCVR IF SUBSYS LP 20-SSOP RoHS:是 類別:RF/IF 和 RFID >> RF 其它 IC 和模塊 系列:- 標準包裝:100 系列:* |
| AD607ARSZ | 制造商:Analog Devices 功能描述:IF Subsystem |
| AD607ARSZ-REEL | 功能描述:IC RECEIVER IF SUBSYS LP 20SSOP RoHS:是 類別:RF/IF 和 RFID >> RF 其它 IC 和模塊 系列:- 標準包裝:100 系列:* |
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