參數(shù)資料
型號(hào): AD5744
廠商: Analog Devices, Inc.
英文描述: Complete, Quad, 14/16-Bit, High Accuracy, Serial Input, Bipolar Voltage Output DAC
中文描述: 完整,四路,14/16-Bit,高精度,串行輸入,雙極性電壓輸出DAC
文件頁(yè)數(shù): 21/27頁(yè)
文件大?。?/td> 243K
代理商: AD5744
Preliminary Technical Data
Rev. PrA 15-Nov-04| Page 21 of 27
FINE GAIN REGISTER
The Fine Gain Register is addressed by setting the three REG bits to 100. The DAC address bits select with which DAC Channel the Data
transfer is to take place (Refer to Table 9). The Fine Gain Register is a 6-bit register and allows the user to adjust the gain of each DAC
channel by -32 LSBs to +31 LSBs in 1 LSB steps as shown in
Table 16 and
Table 17.
Table 16. Programming AD5764 Fine Gain Register
REG2
REG1
REG0
A2
1
0
0
DAC Address
A1
A0
DB15 …. DB6
Don’t Care
DB5
FG5
DB4
FG4
DB3
FG3
DB2
FG2
DB1
FG1
DB0
FG0
Table 17. Fine Gain Register Options
Gain Adjustment
+31 LSBs
+30 LSBs
No Adjustment
-31 LSBs
-32 LSBs
OFFSET REGISTER
The Offset Register is addressed by setting the three REG bits to 101. The DAC address bits select with which DAC Channel the Data
transfer is to take place (Refer to Table 9). The Offset Register is an 8-bit register and allows the user to adjust the offset of each channel
by – 15.875 LSBs to + 16 LSBs in steps of 1/8 LSB as shown in Table 18 and Table 19.
FG5
0
0
-
0
-
1
1
FG4
1
1
-
0
-
0
0
FG3
1
1
-
0
-
0
0
FG2
1
1
-
0
-
0
0
FG1
1
1
-
0
-
0
0
FG0
1
0
-
0
-
1
0
Table 18. Programming the Offset Register
REG2
REG1
REG0
1
0
1
A2
DAC Address
A1
A0
DB15 …. DB8
Don’t Care
DB7
OF7
DB6
OF6
DB5
OF5
DB4
OF4
DB3
OF3
DB2
OF2
DB1
OF1
DB0
OF0
Table 19. Offset Register options
Offset Adjustment
+15.875 LSBs
+16.5 LSBs
No Adjustment
-15.875 LSBs
-16 LSBs
OF7
0
0
-
0
-
1
1
OF6
1
1
-
0
-
0
0
OF5
1
1
-
0
-
0
0
OF4
1
1
-
0
-
0
0
OF3
1
1
-
0
-
0
0
OF2
1
1
-
0
-
0
0
OF1
1
1
-
0
-
0
0
OF0
1
0
-
0
-
1
0
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