參數(shù)資料
型號: AD5381BSTZ-3-REEL
廠商: Analog Devices Inc
文件頁數(shù): 9/40頁
文件大?。?/td> 0K
描述: IC DAC 12BIT 40CH 3V 100-LQFP
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
產(chǎn)品變化通告: AD5381,3 Redesign Change 24/Oct/2011
設(shè)計資源: 40 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5381 (CN0010)
AD5381 Channel Monitor Function (CN0013)
標(biāo)準(zhǔn)包裝: 1
設(shè)置時間: 6µs
位數(shù): 12
數(shù)據(jù)接口: 串行,并聯(lián)
轉(zhuǎn)換器數(shù)目: 40
電壓電源: 單電源
功率耗散(最大): 80mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-LQFP(14x14)
包裝: 標(biāo)準(zhǔn)包裝
輸出數(shù)目和類型: 40 電壓,單極
采樣率(每秒): 167k
其它名稱: AD5381BSTZ-3-REELDKR
Data Sheet
AD5381
Rev. D | Page 17 of 40
TERMINOLOGY
Relative Accuracy
Relative accuracy, or endpoint linearity, is a measure of the
maximum deviation froma straight line passing through the
endpoints of the DAC transfer function. It is measuredafter
adjusting for zero-scale error and full-scale error, and is
expressedin LSB.
Differential Nonlinearity
Differential nonlinearity is the difference betweenthe measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of 1 LSB maximum
ensures monotonicity.
Zero-Scale Error
Zero-scale error is the errorin the DAC output voltagewhen all
0s are loaded into the DAC register. Ideally, with all 0s loaded
to the DAC and m = all 1s, c = 2n – 1
VOUT
(Zero-Scale) = 0 V
Zero-scale error is a measureof the difference between VOUT
(actual) and VOUT (ideal), expressed in mV. It is mainly due to
offsets in the output amplifier.
Offset Error
Offset error is a measure of the differencebetween VOUT
(actual) and VOUT (ideal)in the linear region of the transfer
function, expressed in mV. Offset error is measured on the
AD5381-5 with Code 32 loaded into the DAC register, and on
the AD5381-3 with Code 64.
Gain Error
Gain Error is specified in the linear region of the output range
between VOUT= 10 mV and VOUT = AVDD – 50 mV. It is
the deviation in slope of the DAC transfer characteristicfrom
the ideal and is expressedin %FSR with the DAC output
unloaded.
DC Crosstalk
This is the dc change in the output level of one DAC at
midscale in response to a full-scale code(all 0s to all 1s, and
vice versa)and output change of all other DACs.It is expressed
in LSB.
DC Output Impedance
This is the effective output source resistance.It is dominated by
package lead resistance.
Output Voltage SettlingTime
This is the amount of time it takes for the output of a DAC to
settle to a specified level for a to full-scale input change,
and is measuredfrom the BUSYrising edge.
Digital-to-AnalogGlitch Energy
This is the amount of energy injected into the analog output at
the major code transition. It is specified as the area of the glitch
in nV-s. It is measuredby toggling the DAC registerdata
between 0x7FF and 0x800.
DAC-to-DAC Crosstalk
DAC-to-DACcrosstalkis the glitch impulse that appearsat the
output of one DAC due to both the digital change and the
subsequent analog output change at another DAC. The victim
channel is loaded with midscale. DAC-to-DACcrosstalkis
specified in nV-s.
Digital Crosstalk
The glitch impulse transferred to the output of one converter
due to a change in the DAC register code of another converter
is defined as the digital crosstalkand is specified in nV-s.
Digital Feedthrough
When the device is not selected, high frequency logicactivity
on the device’s digital inputs can be capacitively coupled both
across and through the device to show up as noise on the
VOUT pins. It can also be coupled along the supply and
ground lines. This noise is digital feedthrough.
Output Noise Spectral Density
This is a measure of internally generatedrandomnoise.
Random noise is characterized as a spectral density (voltageper
√Hertz). It is measured by loading all DACs to midscaleand
measuring noise at the output. It is measured in nV/√Hzin a
1 Hz bandwidth at 10 kHz.
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