參數(shù)資料
型號： AD5381BSTZ-3-REEL
廠商： Analog Devices Inc
文件頁數(shù)： 26/40頁
文件大?。?/td> 0K
描述： IC DAC 12BIT 40CH 3V 100-LQFP
產(chǎn)品培訓(xùn)模塊： Data Converter Fundamentals
DAC Architectures
產(chǎn)品變化通告： AD5381,3 Redesign Change 24/Oct/2011
設(shè)計資源： 40 Channels of Programmable Voltage with Excellent Temperature Drift Performance Using AD5381 (CN0010)
AD5381 Channel Monitor Function (CN0013)
標(biāo)準(zhǔn)包裝： 1
設(shè)置時間： 6µs
位數(shù)： 12
數(shù)據(jù)接口： 串行，并聯(lián)
轉(zhuǎn)換器數(shù)目： 40
電壓電源： 單電源
功率耗散（最大）： 80mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 100-LQFP
供應(yīng)商設(shè)備封裝： 100-LQFP（14x14）
包裝： 標(biāo)準(zhǔn)包裝
輸出數(shù)目和類型： 40 電壓，單極
采樣率（每秒）： 167k
其它名稱： AD5381BSTZ-3-REELDKR
AD5381
Data Sheet
Rev. D | Page 32 of 40
AD5381 to PIC16C6x/7x
The PIC16C6x/7x synchronous serial port (SSP)is configured
as an SPI master with the ClockPolarity Bit = 0. This is done
by writing to the synchronousserial port control register
(SSPCON). See the PIC16/17 microcontroller user manual.
In this example I/O, Port RA1 is being used to pulse SYNC
and enable the serial port of the AD5381. This microcontroller
transfers only eight bits of dataduring each serial transfer
operation; therefore,threeconsecutiveread/write operations
may be needed depending on the mode. Figure 36 showsthe
connection diagram.
03732-036
PIC16C6X/7X
AD5381
SDI/RC4
SDO/RC5
SCK/RC3
RA1
SDO
RESET
SER/PAR
DIN
SCLK
SYNC
SPI/I2C
DVDD
Figure 36. AD5381-to-PIC16C6x/7x Interface
AD5381 to 8051
The AD5381 requires a clocksynchronized to the serial data.
The 8051 serial interface must thereforebe operated in Mode 0.
In this mode, serial data enters and exits through RxD, and a
shift clock is output on TxD. Figure 37 shows howthe 8051 is
connected to the AD5381. Because the AD5381 shifts data out
on the rising edge of the shift clock and latches data in on the
falling edge, the shift clock must be inverted.The AD5381
requires its data to be MSBfirst. Since the 8051 outputs the
LSB first, the transmit routine must take this into account.
03732-037
8XC51
AD5381
RxD
TxD
P1.1
SDO
RESET
SER/PAR
DIN
SCLK
SYNC
SPI/I2C
DVDD
Figure 37. AD5381-to-8051 Interface
AD5381 to ADSP-2101/ADSP-2103
Figure 38 shows a serial interface between the AD5381 and the
ADSP-2101/ADSP-2103. The ADSP-2101/ADSP-2103 should
be set up to operate in SPORT transmit alternateframing mode.
The ADSP-2101/ADSP-2103 SPORT is programmedthrough
the SPORT control registerand configuredas follows: internal
clock operation,active low framing, and 16-bit word length.
Transmission is initiated by writing a word to the Tx register
after the SPORT has been enabled.
03732-038
ADSP-2101/
ADSP-2103
AD5381
DR
DT
SCK
TFS
RFS
SDO
RESET
SER/PAR
DIN
SCLK
DVDD
SPI/I2C
SYNC
Figure 38. AD5381-to-ADSP-2101/ADSP-2103 Interface
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AD5381BSTZ-5-REEL IC DAC 12BIT 40CH 5V 100-LQFP
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AD5382BST-5 制造商:Analog Devices 功能描述:DAC 32-CH Resistor-String 14-bit 100-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:32-CHN 5V SINGLE SUPPLY 14-BIT VOUT I.C. - Bulk
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