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參數(shù)資料
| 型號(hào)： | AD53020 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Four Channel ECL Delay Line(四通道ECL延遲線) |
| 中文描述： | ACTIVE DELAY LINE, COMPLEMENTARY OUTPUT, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 3/4頁 |
| 文件大?。?/td> | 88K |
| 代理商： | AD53020 |
–3–
REV. 0
AD53020
Parameter
Symbol
Min
T yp
Max
Units
RISING T O FALLING EDGE DELAY MAT CHING
(VDELAY = VFALL = –0.5 V)
3
Modes
0, 1, 5
Modes 2, 3
0.1
1.0
ns
ns
PROPAGAT ION DELAY T EMPERAT URE
COEFFICIENT
3, 5
0.05
% T pd/
°
C
OUT PUT RISE/FALL T IMES
(20% to 80%)
3
DELAY LINEARIT Y
3
550
ps
MONOT ONIC
NOT ES
1
T he specified limits shown can be met only after thermal equilibrium has been established. T hermal equilibrium is established by applying power for at least two
minutes while maintaining a transverse air flow of 400 linear feet per minute over the device either mounted in the test socket or on the printed circuit board.
2
All minimum propagation delay time measurements refer to both rising and falling edges for Modes 0, 1, 5; these measurements refer to rising edges for Modes 2 and
3 only. DRVMODE is logically low.
3
T his parameter is fully characterized, but not production tested.
4
Delay on leading and trailing edges are measured by setting VDELAY = VWIDT H = –0.7 V. T he variations for each delay are measured by changing the input duty
cycle from 5% to 95% at a constant frequency of 10 MHz.
5
Propagation delay temperature coefficient measured at VDELAY = VWIDT H = –0.7 V.
Specifications subject to change without notice.
ORDE RING GUIDE
Package
Description
Package
Option
Model
AD53020
44-Lead Plastic Leaded Chip Carrier
(PLCC)
P-44A
ABSOLUT E MAX IMUM RAT INGS
1
Parameter
Symbol
Min
Max
Units
V
EE
(Relative to GND)
Voltage on Any Digital Pin
Output Current
Ambient Operating T emperature
Storage T emperature
Junction T emperature
Soldering T emperature
2
(Soldering, 5 sec)
–6.0
V
EE
0
V
V
mA
°
C
°
C
°
C
50
+70
+150
+150
T
A
T
S
T
J
–55
–65
T
SOL
+260
°
C
NOT ES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. T his is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Absolute maximum limits apply individually,
not in combination. Exposure to absolute maximum rating conditions for ex-
tended periods of time may affect device reliability.
2
T o ensure lead solderability, handling with bare hands should be avoided and the
device should be stored in environments at 24
°
C
±
5
°
C (75
°
F
±
10
°
F) with relative
humidity not to exceed 65%.
C AUT ION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD53020 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. T herefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNNG
ESD SENSITIVE DEVICE
PIN CONFIGURAT ION
9
10
11
12
13
7
8
16
17
14
15
2
1
44
3
4
5
6
42 41 40
43
35
36
37
38
39
33
34
31
32
29
30
IN1
IN1
GND1
COMP1
REXT1
COMP2
REXT2
G
G
O
O
O
IN4
V
EE4
VDELAY4
VWIDTH4
VDELAY3
VWIDTH3
VDELAY2
VWIDTH2
VDELAY1
VWIDTH1
V
BB
DRVMODE
S0
S1
GND1
I
G
V
E
I
I
G
V
E
I
I
G
V
E
18 19 20
O
21 22 23 24 25 26 27 28
PIN 1
TOP VIEW
(Not to Scale)
AD53020
O
G
O
O
O
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