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參數(shù)資料
| 型號： | AD5326 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Dual Rail-To-Rail,Voltage Output 12-Bit DACs(滿幅度電壓輸出雙12位D/A轉(zhuǎn)換器) |
| 中文描述： | 雙通道軌至軌電壓輸出12位DAC（滿幅度電壓輸出雙12位的D / A轉(zhuǎn)換器） |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 351K |
| 代理商： | AD5326 |
low the 2 LSBs of the 7-bit slave address to be set by the
user. The first five bits have been factory programmed and
are always 00011.
Each DAC has its own separate reference. These reference
inputs can be configured as buffered or unbuffered inputs
depending on the state of the BUF bit in the input word.
The parts incorporate a power-on-reset circuit that ensures
that the DAC outputs power up to zero volts and remain
there until a valid write takes place to the device. There is
also a
CLR
bit in the input word which clears all DACs to
0V. The outputs of all DACs may be updated simulta-
neously using the asynchronous
LDAC
input.The parts
a
Prelim Technical Information
AD5306/16/26*
FEATURES
AD5306: Four 8-Bit DACs in One Package
AD5316: Four 10-Bit DACs in One Package
AD5326: Four 12-Bit DACs in One Package
16-Pin TSSOP Package
Micro-Power Operation: 600
μ
A @ 5V (Including Ref-
erence Current)
2-Wire Serial Interface
Power Down to 200nA@5V, 50nA@3V
+2.5V to +5.5V Power Supply
Double-Buffered Input Logic
Guaranteed Monotonic By Design
Buffered/Unbuffered Reference Input Options
Output Range: 0-V
REF
or 0-2V
REF
Power-On-Reset to Zero Volts
Simultaneous Update of DAC Outputs (LDAC pin)
Clear Facility
On-Chip Output Buffer Amplifiers with Rail-to-Rail
Operation
APPLICATIONS
Portable Battery Powered Instruments
Digital Gain and Offset Adjustment
Programmable Voltage and Current Sources
Programmable Attenuators
GENERAL DESCRIPTION
The AD5306/16/26 are quad 8, 10 and 12-bit buffered
voltage output DACs which operate from a single +2.5V
to +5.5V supply. Their on-chip precision output amplifi-
ers allow rail-to-rail output swing to be achieved. The
AD5306/16/26 utilize a 2-wire serial interface which oper-
ates at clock rates up to 400kHz. This simple interface al-
lows communication between multiple devices on a single
bus. The AD5306/16/26 contain A0 and A1 pins which al-
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 781/329-4700
WWW site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 1998
contain a power-down feature which reduces the current
consumption of the devices to 200nA at 5V (50nA at 3V).
All DACs are powered-down together.
The output ranges for any or all DACs can be set at 0-
V
REF
or 0-2V
REF
depending on the Gain bit.
The low power consumption of these parts in normal op-
eration make them ideally suited to portable battery-oper-
ated equipment. The power consumption is 2.5mW at 5V
reducing to 1μW in power-down mode.
The AD5306/16/26 are all available in 16-pin TSSOP
packages.
PRODUCT HIGHLIGHTS
1. Low Power, Single supply operation. These parts operate
from a single +2.5V to +5.5V supply and consume 1.2
mW at 3V and 2.5 mW at 5V making them ideal for
battery-powered applications. Since the references may
be buffered internally no external reference current is
required and system power consumption is reduced.
2. The on-chip output buffer amplifiers allow the outputs
of the DACs to swing rail-to-rail with a slew rate of
1V/μs.
3. Reference pins may be configured as buffered or
unbuffered.The unbuffered option allows the reference
input to be as high as V
DD
.
4. 2-Wire serial interface with clock speeds up to 400kHz
5. Power-down capability. When powered down the DACs
consume 50nA at 3V and 200nA at 5V.
6. Output range of 0-V
REF
or 0-2V
REF
.
7. Packaged in a 16-pin TSSOP package.
Prelim.B 9/98
+2.5 V to +5.5 V, 600
μ
A,Quad Rail-To-Rail,
Voltage Output 8/10/12-Bit DACs
FUNCTIONAL BLOCK DIAGRAM
VREFA
SPI
,
QSPI
are Trademarks of Motorola.
MICROWIRE
is a Trademark of National Semiconductor.
DAC
LATCH
DAC A
INPUT
LATCH
VREFD VREFC
CONTROL
LOGIC
AD5306/16/26
VOUT A
VOUT B
DAC
LATCH
DAC B
INPUT
LATCH
DAC
LATCH
DAC C
INPUT
LATCH
DAC
LATCH
DAC D
INPUT
LATCH
VOUT C
VOUT D
G ND
VDD
SDA SCL
POWER-ON
RESET
LDAC
VREFB
A1
A0
PD
*Protected by U.S. Patent No. 5684481
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