參數(shù)資料
型號: AD5100YRQZ-RL7
廠商: ANALOG DEVICES INC
元件分類: 電源管理
英文描述: System-Management IC with Programmable Quad Voltage Monitoring and Supervisory Functions
中文描述: 4-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO16
封裝: 0.025 INCH PITCH, ROHS COMPLIANT, MO-137AB, QSOP-16
文件頁數(shù): 24/32頁
文件大小: 495K
代理商: AD5100YRQZ-RL7
AD5100
Preliminary Technical Data
Rev. PrJ | Page 24 of 32
1 – Software assertion of SHDN Active
[3] – 0 - Over-ride of permanent settings Inactive
1 - Over-ride of permanent settings Active
[7:4] – Reserved
0x17
R/
W
N
Special Functions 2
[0] – 0 – Software Power-down of AD5100 Inactive
1 – Software Power-down of AD5100 Active
(2)
[7:1] – Reserved
0x00
0x18
R/
W
N
Disable Special Functions
(3)
[0] – 0 – Allow Over-ride Function
1 – Disable Further Over-ride Function
[1] – 0 – Allow OTP Function
1 – Disable OTP Function
[2] – 0 – Allow Manufacturer Test-modes
1 – Disable Manufacturer Test-modes
[3] – 0 – Allow Software power-down Function
1 - Disable Software power-down Function
[4] – 0 – Allow Software assertion of SHDN Function
1 – Disable Software assertion of SHDN Function
[7:5] – Reserved
0x00
0x19
R-
on
ly
N
Fault Detect & Status Register
[3:0] – These 4 level triggered bits indicate the current state of the
comparators monitoring the V
1MON
and V
2MON
input pins.
[0] – A ‘1’ indicates V
2MON
input < V
2MON
OFF Threshold
[1] – A ‘1’ indicates V
2MON
input > V
2MON
ON Threshold
[2] – A ‘1’ indicates V
1MON
input < V
1MON
UV Threshold
[3] – A ‘1’ indicates V
1MON
input > V
1MON
OV Threshold
[6:4] – These are Fault Detection bits can be decoded to indicate one or
more conditions were present when a SHDN event occurred. These
bits are edge triggered.
000 – None
001 – V
1MON
UV only
010 – V
1MON
OV only
011 – Never Occur
100 – V
2MON
Below OFF only
101 – V
1MON
UV AND V
2MON
Below OFF Both Occur
110 – V
1MON
OV AND V
2MON
Below OFF Both Occur
0x00
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