
AD28msp01
REV. A
–16–
DESIGN CONSIDERATIONS
Analog Input
The analog input signal to the AD28msp01 must be ac coupled.
Figure 12 shows the recommended input circuit for the
AD28msp01’s analog input pin (V
IN
). The circuit of Figure 12
implements a first-order low-pass filter with a 3 dB point at
20 kHz; this is the only filter that must be implemented external
to the AD28msp01 to prevent aliasing of the sampled signal.
Since the AD28msp01’s ADC uses a highly oversampled ap-
proach that transfers the bulk of the anti-aliasing filtering into
the digital domain, the off-chip anti-aliasing filter need only be
of low order.
In the circuit shown in Figure 12, scaling of the analog input is
achieved by the resistors R
IN
and R
FB
. The input signal gain,
–R
FB
/R
IN
, can be adjusted by varying the values of these resis-
tors. Total gain must be configured to ensure that a full-scale in-
put signal (at C
IN
in Figure 12) produces a signal level at the
input to the sigma-delta modulator of the ADC that does not
exceed V
INMAX
, which is specified under “Analog Interface Elec-
trical Characteristics.” If the total gain is increased above unity
(i.e., gain >1), signal-to-noise (SNR + THD) performance may
not meet the listed specifications.
The dc offsetting of the analog input signal is accomplished with
an on-chip voltage reference which nominally equals 2.5 V. The
input signal must be ac coupled with an external coupling ca-
pacitor (C
IN
). C
IN
and R
IN
should be chosen to ensure a cou-
pling corner frequency of 30 Hz. C
IN
should be 0.1
μ
F or larger.
VOLTAGE
REFERENCE
AD28msp01
C
FB
C
IN
INPUT
SIGNAL
R
IN
R
FB
V
FB
V
IN
Figure 12. Recommended Analog Input Circuit
To select values for the components shown in Figure 12, use the
following equations:
Gain
=
–
R
FB
R
IN
C
IN
=
1
60
π
R
IN
C
FB
=
1
(2
π
)(20 *10
3
)
R
FB
10
k
≤
R
FB
,
R
IN
≤
50
k
150
pF
≤
C
FB
≤
600
pF
Figure 13 shows an example of a typical input circuit configured
for 0 dB gain. The circuit’s diodes are used to prevent the input
signal from exceeding maximum limits.
INPUT
SIGNAL
10k
1.0
μ
F
V
CC
10k
20k
330pF
GND
A
VOLTAGE
REFERENCE
AD28msp01
V
FB
V
IN
Figure 13. Typical Input Circuit (0 dB Gain)
Analog Output
The AD28msp01’s differential analog output (V
OUTP
, V
OUTN
) is
produced by an on-chip differential amplifier. The differential
amplifier can drive a minimum load of 2 k
(R
L
≥
2 k
) and
has a maximum differential output voltage swing of 6.312 V
peak-to-peak (3.17 dBm0). The differential output can be ac-
coupled directly to a load or dc-coupled to an external amplifier.
AD28msp01
V
OUTP
V
OUTN
C
OUT
C
OUT
R
L
Figure 14. Example Circuit for Differential Output with AC
Coupling
Figure 14 shows a simple circuit providing a differential output
with ac coupling. The capacitor of this circuit (C
OUT
) is op-
tional; if used, its value can be chosen as follows:
C
OUT
=
1
(60
π
)
R
L
The V
OUTP
–V
OUTN
outputs must be used as differential outputs;
do not use either as a single-ended output. Figure 15 shows an
example circuit which can he used to convert the differential
output to a single-ended output. The circuit uses a differential-
to-single-ended amplifier, the Analog Devices SSM2141.