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參數(shù)資料
| 型號(hào)： | AD280 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Universal Multichannel Industrial Signal Conditioning ADC(通用,多通道,工業(yè)信號(hào)調(diào)節(jié)A/D轉(zhuǎn)換器) |
| 中文描述： | 工業(yè)通用多通道ADC的信號(hào)調(diào)理（通用，多通道，工業(yè)信號(hào)調(diào)節(jié)的A / D轉(zhuǎn)換器） |
| 文件頁數(shù)： | 2/12頁 |
| 文件大小： | 150K |
| 代理商： | AD280 |
–2–
REV. 0
AD280–SPECIFICATIONS
1
Parameter
PRELMNARY
106
0
25
50
±
2.5
±
3
±
100
±
20
±
50
±
0.5
±
25
±
50
TECHNCAL
DATA
μ
V
μ
V/
°
C
% FSR
ppm/
°
C
(@ T
A
= –25
8
C to +85
8
C, V
DD
= +5 V
6
10% unless otherwise noted)
Min
Typ
Max
Units
Notes
INPUT CHARACTERISTICS
Input Voltage Range
High Impedance Mode
±
3
±
3.5
V
For Linear Operation Without Signal Clipping
in High Impedance Mode, Pins AIN0–AIN3
For Linear Operation Without Signal Clipping
in Attenuator Mode, Pins AIN0–AIN3
Attenuator Mode
±
11
V
Input Impedance
High Impedance Mode
20
M
Pins AIN0–AIN3, Also GND SENSE and
CJCIN when JC Excitation Is Disabled
Pins AIN0–AIN3
Pins AIN0–AIN3, Also GND SENSE and
CJCIN when JC Excitation Is Disabled
Pins AIN0–AIN3, Also GND SENSE and
CJCIN when JC Excitation Is Disabled
Difference Between Perceived Bias Current
at Any Input Pin When Selected
Pins AIN0–AIN3, Also GND SENSE and
CJCIN when JC Excitation Is Disabled
Attenuator Mode
Bias Current
70
100
1
130
k
nA
Bias Current over Temperature Range
2
nA
Differential Bias Current
100
pA
Input Capacitance
7
pF
PROGRAMMABLE GAIN AMPLIFIER
PGA Gains
Gain Ratio Accuracy
Gain Ratio Temperature Stability
Input Offset Voltage
Input Offset Voltage Temperature Stability
1
128
0.3
In Binary Steps
0.1
5
10
2
%/FSR
ppm/
°
C FSR
μ
V
μ
V/
°
C
50
5
A/D CONVERTER
Conversion Period
1
200
ms
Programmable, Dependent Upon Crystal
Oscillator Frequency
INT
= 16.66 ms, f
CLK
= 12 MHz
@ t
INT
= 200 ms, f
CLK
= 12 MHz
Including PGA Nonlinearity
@ t
INT
= 100 ms, f
CLK
= 12 MHz
@ t
INT
= 16.66 ms, f
CLK
= 12 MHz
@ t
INT
= 100 ms, f
CLK
= 12 MHz
With C
INT
= 4.7 nF (see Note 1)
Resolution
±
32,000
±
100,000
±
0.0015
±
4
92
Counts
% FSR
Counts
dB
dB
μ
s
V
Integral Linearity
Noise
Normal-Mode Rejection
±
0.003
Measurement Latency
Nominal Input Span
Input Offset
Input Offset Drift
Span Error
Span Drift
See Note 2
See Note 2
See Note 2
See Note 2
EXCITATION OUTPUTS
Output Current
Excitation Disabled
Set for Positive Open Circuit Detection
Set for Negative Open Circuit Detection
Set for RTD Excitation
1
–30
30
2
nA
nA
nA
mA
EXC0–EXC3
EXC0–EXC3
EXC0–EXC3
EXC0 and EXC1 Only, Magnitude Depends
on Value of External Resistor
EXC0 and EXC1 Only, Not Including Drift
of External Resistor
–20
20
0
–25
25
Temperature Stability, RTD Mode
±
35
ppm/
°
C
REFERENCE OUTPUT AND INPUT
Reference Voltage
Reference Voltage Temperature Stability
Reference Pin Output Current
2.475 2.5
2.525
V
ppm/
°
C
mA
25
1
Excluding Current Required by REFIN Pin
DIGITAL LEVELS
Input Logic 0 Voltage
Input Logic 1 Voltage
Output Logic 0 Voltage
Output Logic 1 Voltage
0.8
V
V
V
V
2
0.45
@ I = 1 mA
@ I = –60
μ
A
2.4
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