參數(shù)資料
型號: AD280
廠商: Analog Devices, Inc.
英文描述: Universal Multichannel Industrial Signal Conditioning ADC(通用,多通道,工業(yè)信號調(diào)節(jié)A/D轉(zhuǎn)換器)
中文描述: 工業(yè)通用多通道ADC的信號調(diào)理(通用,多通道,工業(yè)信號調(diào)節(jié)的A / D轉(zhuǎn)換器)
文件頁數(shù): 10/12頁
文件大?。?/td> 150K
代理商: AD280
AD280
–10–
REV. 0
PRELMNARY
TECHNCAL
sources.
When written, the contents of these bytes will be latched and
will hold their values until overwritten with new values. At
power-up, the contents of these latches will be undefined. They
must be loaded before an A/D conversion can be performed.
Any attempt to write to these latches during the course of an
A/D conversion will cause the conversion to be aborted. The
write cycle will, however, be considered valid and the data will
be latched.
DATA
All communications with the AD280 are composed of byte
transfers. Each byte transfer is bracketed by the dropping of the
CE
line, and the SK input is used to shift data in and out of the
device. Input data is clocked in on the rising edge of SK, and
output data is valid at the falling edge of SK.
Note that SK must
be high at both the rising and falling edges of
CE
.
There are six “write” registers and four “read” registers within
the AD280, as shown in Figure 10. To initiate a communica-
tion sequence, the microcontroller, which contains a 4-bit com-
mand code, writes a command byte to the AD280. The AD280
command register (CMD) is the first of the six “write” registers.
It will be loaded with the 4-bit command code that determines
the type of communication, and the number of bytes in the
communication sequence.
Table III shows the possible command codes. After RESET, the
AD280 will be in “command mode,” where it expects to receive
a command byte from the microcontroller. If the command
code specifies a “write” sequence, the microcontroller will then
transmit one or more parameter bytes to the AD280. If the
command code specifies a “read” sequence, the microcontroller
will receive one or more parameter bytes from the AD280. The
only exception is the “start conversion” command code, which
requires no data bytes. An undefined command code will be
treated as a NOP (no operation) and ignored.
t
DIH
t
DISU
t
CESK
t
SKL
t
SKH
t
CESK
CE
SK
DI
DON'T
CARE
DON'T
CARE
DON'T
CARE
CMD3
CMD2
CMD1
CMD0
MSB
LSB
DON'T
CARE
DON'T
CARE
DO
t
SKDV
t
DREL
Figure 8. Read Cycle
t
DIH
t
DISU
t
CESK
t
SKL
t
SKH
t
CESK
CE
SK
DI
DON'T
CARE
DON'T
CARE
DON'T
CARE
START
BIT
CMD3
CMD2
CMD1
CMD0
MSB
LSB
DON'T
CARE
Figure 9. Write Cycle
If a communications sequence is interrupted, the AD280 may
get stuck waiting for a data transfer that never occurs. There are
two ways to force the AD280 back into “command mode”: one
is to activate the RESET IN signal and the other is to write four
consecutive bytes with all bits set to “0.”
There are five “write” registers which constitute configuration
the 16-bit binary integer value that determines the length of
integration time for A/D conversions. The next byte, CFG2,
contains four bits to control the input attenuation for each chan-
nel and four bits to drive the auxiliary digital output signals.
CFG3 contains three bits to control the multiplexer, three bits
to control the programmable gain amplifier, and one bit for CJC
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