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參數(shù)資料
| 型號： | AD1891JP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SamplePort Stereo Asynchronous Sample Rate Converters |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數(shù)： | 9/20頁 |
| 文件大?。?/td> | 416K |
| 代理商： | AD1891JP |
AD1890/AD1891
REV. 0
–9–
AMP
TIME
SUBFILTER COEFFICIENTS
ALIGNED TO THE LEFT
Tsin = 1/Fsin
FREQ
Fsin/2
Fsin/2
Fsin/2
Fsin/2
Fsin/2
PHASE
DELAY = NOMINAL
DELAY = NOMINAL
DELAY = NOMINAL – .25/Fsin
DELAY = NOMINAL – .5/Fsin
DELAY = NOMINAL – .75/Fsin
Figure 3. Four Polyphase Subfilters Realigned to Coarse Time Grid
POLYPHASE FILTER 1
POLYPHASE FILTER 2
POLYPHASE FILTER 3
POLYPHASE FILTER 4
POLYPHASE FILTER 5
POLYPHASE FILTER 6
POLYPHASE FILTER 7
INPUT
SIGNAL
POLYPHASE FILTER N-1
POLYPHASE FILTER N
SELECT
N TO 1
MUX
OUTPUT
SIGNAL
SAMPLE
CLOCK
TRACKING
CIRCUIT
PARALLEL POLYPHASE
FILTER BANK
Figure 4. Polyphase Filter Bank Model—Conceptual Block
Diagram
T he full set of subfilters can be considered to form a parallel
bank of “polyphase” filters which have decrementing, linear
phase group delays. All of the polyphase filters conceptually pro-
cess the input signal simultaneously, as illustrated in Figure 4, at
the input sample rate.
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| AD1892JRRL | 制造商:Analog Devices 功能描述:Receiver/Rate Converter 28-Pin SOIC W T/R 制造商:Rochester Electronics LLC 功能描述:INTEGRATED DIG.RECEIVER/RATE CONVERTER - Bulk |
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