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參數(shù)資料
| 型號： | AD1818 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | PCI SoundComm DC97 Digital Controller(PCI SoundComm DC97型數(shù)字控制器) |
| 中文描述： | 的PCI SoundComm DC97數(shù)字控制器（的PCI SoundComm DC97型數(shù)字控制器） |
| 文件頁數(shù)： | 18/29頁 |
| 文件大?。?/td> | 364K |
| 代理商： | AD1818 |
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AD1818
–18–
REV. 0
PCI Target Abort Interrupt Enable
Master Abort Interrupt Enable
Reserved
DSP DMA Control Register Definition
Bit #
Description
0
DMA Enable
1
DMA Write/
Read
2
Flush Master FIFO
3
Clear DSP Boot Mode
4
DMA Packing Enable
5
D3 Power-Down Enable
7–6
Reserved
8
DMA Channel Halt Status (1 = Halt)
9
DMA FIFO Empty Status (1 = Empty)
15–10
Reserved
TECHNCAL
DATA
DMA Channel PCI Control/Status Registers:
Bit #
Description
0
SGD Enable
1
Loop Enable
3–2
Interrupt Mode:
00 Interrupt Disabled
01 Interrupt on Count
10 Interrupt on SGD Flag
11 Interrupt on EOL
5–4
Current SGD Valid
00 Full SGD Descriptor Needed
(Software Must Initialize This Value)
01 Partial SGD Descriptor Fetched
10 SGD Valid
11 Reserved (Invalid Status)
6
Flag Bit Set in Current SGD
7
EOL Bit Set in Current SGD
DMA Interrupt Register 1
Bit #
Description
0
DMA Input Channel 0 Interrupt
1
DMA Input Channel 1 Interrupt
. . .
31
DMA Input Channel 31 Interrupt
DMA Interrupt Register 2
Bit #
Description
0
DMA Output Channel 0 Interrupt
1
DMA Output Channel 1 Interrupt
2
DMA Output Channel 2 Interrupt
3
DMA Output Channel 3 Interrupt
4
DSP DMA Channel Interrupt
13–5
Reserved
14
PCI Target Abort Interrupt
15
Master Abort Interrupt
16
17
31–18
Mailbox Control/Status Register Definition
Bit #
Description
3–0
Incoming Mailbox Full (MSB:LSB) (R/WC)
7–4
Outgoing Mailbox Full (MSB:LSB) (R/WC)
11–8
Reserved
12
Incoming Mailbox PCI Interrupt Pending (R/WC)
13
Outgoing Mailbox PCI Interrupt Pending (R/WC)
14
Incoming Mailbox DSP Interrupt Pending (R/WC)
15
Outgoing Mailbox DSP Interrupt Pending (R/WC)
16
Incoming Mailbox PCI Interrupt Enable (R/W)
17
Outgoing Mailbox PCI Interrupt Enable (R/W)
18
Incoming Mailbox DSP Interrupt Enable (R/W)
Outgoing Mailbox DSP Interrupt Enable (R/W)
31–20
Reserved
Analog Codec Interface Control/Status Register:
Bit #
Description
0
Analog Codec Interface Enable
1
Analog Codec Reset Disable
2
Audio Stream Output Enable
3
AD1819/ AC ’97 Mode
5–4
AD1819 DSP Audio Output Control
6
AD1819 Modem I/O Enable
7
AD1819 Handset I/O Enable
8
Force SDATA_OUT High
9
Force SYNC High
14–10
Reserved
15
Analog Codec Ready Status (RO)
Legacy Audio Control/Status Register:
0
MIDI Interrupt Enable
1
Subsystem ID Write Enable
3–2
Reserved
5–4
Music Synthesizer Test Mode
6
Reserved
7
MIDI Interrupt Pending (RO)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD1819A | AC97 SoundPort Codec(AC97型聲音端口信號編解碼器) |
| AD1819BJST | AC’97 SoundPort Codec |
| AD1819 | ECONOLINE: RD & RC - Dual Output from a Single Input Rail- 1kVDC & 2kVDC Isolation- Power Sharing on Output- Custom Solutions Available- UL94V-0 Package Material- Efficiency to 86% |
| AD1819B | AC’97 SoundPort Codec |
| AD1833A | 24-Bit, 192 kHz, DAC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD18-182 | 制造商:Thomas & Betts 功能描述:Terminal; 22 to 18 AWG; Brass; Non-Insulated; Tin Plated; UL 94V-2 制造商:Thomas & Betts 功能描述:DISCONNECTFEMALE 制造商:Thomas & Betts 功能描述:Quick Disconnect Terminal 18-22AWG F 21.08mm 5.84mm Tin |
| AD18-183 | 制造商:Thomas & Betts 功能描述:Terminal; 22 to 18 AWG; Brass; Nylon; Tin Plated; UL 94V-2 制造商:Thomas & Betts 功能描述:NON-INS FEM-187 DISC, 22-18 LEN .64 制造商:Thomas & Betts 功能描述:Quick Disconnect Terminal 18-22AWG F 16.26mm 5.84mm Tin |
| AD1819 | 制造商:AD 制造商全稱:Analog Devices 功能描述:AC’97 SoundPort Codec |
| AD1819AJST | 制造商:Rochester Electronics LLC 功能描述: |
| AD1819B | 制造商:AD 制造商全稱:Analog Devices 功能描述:AC’97 SoundPort Codec |
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