參數(shù)資料
型號: A42MX16-1VQ100
廠商: Electronic Theatre Controls, Inc.
英文描述: Power Transformer; Series:VPS; Power Rating:43VA; Mounting Type:Chassis; Current Rating:1.2 Series/2.4 Prllel A; External Depth:2.000"; External Height:2.688"; External Width:3.125"; Leaded Process Compatible:No
中文描述: 40MX和42MX FPGA系列
文件頁數(shù): 94/120頁
文件大?。?/td> 854K
代理商: A42MX16-1VQ100
75
4958B–AUTO–11/10
Atmel ATA6285/ATA6286 [Preliminary]
In safety level 2, it is not possible to disable the Watchdog Timer, not even with the algorithm
described above, refer to Table 3-30 on page 74.
WDE is overridden by WDRF in MCUSR. This means the WDE is always set when the WDRF is
set. To clear WDE, WDRF must be cleared first. This feature ensures multiple resets during con-
ditions causing failure, and a save start-up after the failure.
The following code example shows one assembly and one C function for turning off the
Watch-dog Timer. The example includes the disabling of global interrupts so that no interrupt will
occur during the execution of these functions.
Note:
Assembly Code Example(1)
WDT_off:
; Turn off global interrupt
cli
; Reset Watchdog Timer
wdr
; Clear WDRF in MCUSR
in r16, MCUSR
andi r16, (0xff & (0<<WDRF))
out MCUSR, r16
; Write logical one to WDCE and WDE
; Keep old prescaler setting to prevent unintentional time-out
lds r16, WDTCR
ori r16, (1<<WDCE) | (1<<WDE)
sts WDTCR, r16
; Turn off WDT
ldi r16, (0<<WDE)
sts WDTCR, r16
; Turn on global interrupt
sei
ret
C Code Example(1)
void WDT_off(void)
{
__disable_interrupt();
__watchdog_reset();
/* Clear WDRF in MCUSR */
MCUSR &= ~(1<<WDRF);
/* Write logical one to WDCE and WDE */
/* Keep old prescaler setting to prevent unintentional time-out */
WDTCR |= (1<<WDCE) | (1<<WDE);
/* Turn off WDT */
WDTCR = 0x00;
__enable_interrupt();
}
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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A42MX16-1VQ100B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:40MX and 42MX FPGA Families
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