參數(shù)資料
型號(hào): 9EX21501AKLF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: 21501 SERIES, PLL BASED CLOCK DRIVER, 15 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC64
封裝: ROHS COMPLIANT, PLASTIC, MLF-64
文件頁(yè)數(shù): 2/15頁(yè)
文件大小: 200K
代理商: 9EX21501AKLF
IDT
15 Output PCIe G2/QPI Differential Buffer with 2:1 Input Mux
1578—01/18/11
9EX21501
15 Output PCIe G2/QPI Differential Buffer with 2:1 Input Mux
10
Datasheet
General SMBus serial interface information for the 9EX21501
How to Write:
Controller (host) sends a start bit.
Controller (host) sends the write address D4
(H)
ICS clock will
acknowledge
Controller (host) sends the beginning byte location = N
ICS clock will
acknowledge
Controller (host) sends the data byte count = X
ICS clock will
acknowledge
Controller (host) starts sending
Byte N through
Byte N + X -1
ICS clock will
acknowledge each byte one at a time
Controller (host) sends a Stop bit
How to Read:
Controller (host) will send start bit.
Controller (host) sends the write address D4
(H)
ICS clock will
acknowledge
Controller (host) sends the begining byte
location = N
ICS clock will
acknowledge
Controller (host) will send a separate start bit.
Controller (host) sends the read address D5
(H)
ICS clock will
acknowledge
ICS clock will send the data byte count = X
ICS clock sends
Byte N + X -1
ICS clock sends
Byte 0 through byte X (if X
(H)
was written to byte 8).
Controller (host) will need to acknowledge each byte
Controller (host) will send a not acknowledge bit
Controller (host) will send a stop bit
ICS (Sla ve /Re ce ive r)
T
WR
ACK
P
Byte N + X - 1
Data Byte Count = X
Beginning Byte N
stoP bit
X
Byt
e
Index Block Write Operation
Slave Address D4(H)
Beginning Byte = N
WRite
starT bit
Controlle r (Host)
T
starT bit
WR
WRite
RT
Repeat starT
RD
ReaD
Beginning Byte N
Byte N + X - 1
N
Not acknowledge
PstoP bit
ICS (Sla ve /Re ce ive r)
Controlle r (Host)
X
By
te
ACK
Data Byte Count = X
ACK
Slave Address D5(H)
Index Block Read Operation
Slave Address D4(H)
Beginning Byte = N
ACK
Note: SMBus address is selectable among 4 addresses.
See tabel on page 2.
相關(guān)PDF資料
PDF描述
9EX21501AKILF 21501 SERIES, PLL BASED CLOCK DRIVER, 15 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC64
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9EX21831AKLF 21831 SERIES, PLL BASED CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72
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