- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄25565 > 9EX21831AKLFT (INTEGRATED DEVICE TECHNOLOGY INC) 21831 SERIES, PLL BASED CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72 PDF資料下載
參數(shù)資料
| 型號： | 9EX21831AKLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 21831 SERIES, PLL BASED CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MLF-72 |
| 文件頁數(shù)： | 1/17頁 |
| 文件大?。?/td> | 179K |
| 代理商： | 9EX21831AKLFT |
9EX21831
IDT
Eighteen Output Differential Buffer w/2 input mux for PCIe Gen3
1678A—07/13/10
Eighteen Output Differential Buffer w/2 input mux for
PCIe Gen3
1
DATASHEET
Recommended Application:
18 Output PCIe G3 Differential Buffer with 2:1 input mux
General Description
The ICS9EX21831 provides 18 output clocks for PCIe Gen3
applications. The 9EX21831 has 4 selectable SMBus
addresses, and dedicated CKPWRGD/PD# and VDDA pins
for easy board design. A differential clock from a CK410B+
or CK420BQ main clock generator, such as the ICS932S421,
drives the ICS9EX21831. In fanout mode, the 9EX21831
provides outputs up to 166MHz.
Output Features:
18 - 0.7V current mode differential HSCL output pairs
Features/Benefits:
Pin compatible to 9EX21801/ Easy PCIe Gen3
upgrade
4 Selectable SMBus Addresses/Mulitple devices can
share the same SMBus Segment
10 dedicated and 2 group OE# pins/Hardware control
of the outputs
PLL or bypass mode/PLL can dejitter incoming clock
Selectable PLL bandwidth/minimizes jitter peaking in
downstream PLL's
Spread Spectrum Compatible/tracks spreading input
clock for low EMI
SMBus Interface/unused outputs can be disabled
Undriven differential outputs in Power Down mode/
Easy power management
Key Specifications:
Cycle-to-cycle jitter <50ps
Output-to-output skew < 150 ps
PCIe Gen3 phase jitter < 1.0ps RMS
Functional Block Diagram
CLKA_IN
CLKA_IN#
DIF(17:0)
HIBW_BYPM_LOBW#
SEL_A_B#
SMBDAT
SMBCLK
CKPWRGD/PD#
18
IREF
OE(17:15)#
OE(14:5)#,
OE_01234#
12
SMB_A0
SMB_A1
CLKB_IN
CLKB_IN#
PLL
(SS Compatible)
Logic
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 9EX21831AKLF | 21831 SERIES, PLL BASED CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72 |
| 9FG104DGLFT | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| 9FG104DFLF | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| 9FG104DGILF | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| 9FG104DFILFT | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 9EZCA0100000000 | 制造商:Eaton Corporation 功能描述:9E 20 & 30 kVA IAC - Tie for 1+1 Redundant with Maintenance Bypass |
| 9F-110 | 制造商:NA 功能描述: |
| 9F33U0 | 制造商:Thomas & Betts 功能描述:30A,PLG,REV,3P3W,DG,U0,600VAC, |
| 9F33U1 | 制造商:Thomas & Betts 功能描述:30A,PLG,REV,2P3W,DG,U1,125V |
| 9F33U2 | 制造商:Thomas & Betts 功能描述:30A,PLG,REV,2P3W,DG,U2,3P250VAC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。