參數(shù)資料
型號: 9EX21831AKLFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: 21831 SERIES, PLL BASED CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72
封裝: ROHS COMPLIANT, PLASTIC, MLF-72
文件頁數(shù): 10/17頁
文件大?。?/td> 179K
代理商: 9EX21831AKLFT
IDT
Eighteen Output Differential Buffer w/2 input mux for PCIe Gen3
1678A—07/13/10
9EX21831
Eighteen Output Differential Buffer w/2 input mux for PCIe Gen3
2
Pin Configuration
OE
9
#
DI
F
_
9
#
DI
F
_
9
C
KPW
R
G
D
/PD
#
SEL
_
A
_
B
#
SM
B
_
A0
SM
B
_
A1
SM
B
D
AT
SM
B
C
L
K
H
IBW
_
BYP
M
_
L
O
BW
#
VD
D
DI
F
_
8
#
DI
F
_
8
OE
8
#
DI
F
_
7
#
DI
F
_
7
OE
7
#
VD
D
72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55
VDD
154 DIF_6#
OE10#
253 DIF_6
DIF_10
352 OE6#
DIF_10#
451 DIF_5#
OE11#
550 DIF_5
DIF_11
649 OE5#
DIF_11#
748 DIF_4#
OE12#
847 DIF_4
DIF_12
946 DIF_3#
DIF_12# 10
45 DIF_3
GND 11
44 GND
VDD 12
43 VDD
DIF_13 13
42 DIF_2#
DIF_13# 14
41 DIF_2
OE13# 15
40 DIF_1#
DIF_14 16
39 DIF_1
DIF_14# 17
38 DIF_0#
OE14# 18
37 DIF_0
19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36
DI
F
_
1
5
D
IF
_
15#
VD
D
O
E
1
5_17#
DI
F
_
1
6
D
IF
_
16#
DI
F
_
1
7
D
IF
_
17#
IR
EF
GN
D
A
VD
D
A
CL
K
A
_
IN
CL
K
A
_
IN#
GN
D
CL
K
B
_
IN
CL
K
B
_
IN#
VD
D
O
E
_
01234
#
9EX21831AKLF
Power Down Functionality
OUTPUTS
CKPWRGD/PD#
Input
DIF_x
1
Running
ON
0X
Hi-Z
OFF
PLL State
INPUTS
Power Groups
VDD
GND
29
28
Main PLL, Analog
35
32
Input buffers
1,12,21,35,43,
55,62
11,32,44
DIF clocks
Description
Pin Number
HIBW_BYPM_LOBW# Selection (Pin 63)
State
Voltage
Mode
Low
<0.8V
Low BW
Mid
1.2<Vin<1.8V
Bypass
High
Vin > 2.0V
High BW
SMBus Address Selection (pins 66, 67)
SMB_A1
SMB_A0
Address
00
D4
01
D6
10
D8
11
DA
相關(guān)PDF資料
PDF描述
9EX21831AKLF 21831 SERIES, PLL BASED CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72
9FG104DGLFT 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28
9FG104DFLF 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28
9FG104DGILF 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28
9FG104DFILFT 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28
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