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參數(shù)資料
| 型號： | 9EX21831AKLFT |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 21831 SERIES, PLL BASED CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MLF-72 |
| 文件頁數(shù)： | 4/17頁 |
| 文件大?。?/td> | 179K |
| 代理商： | 9EX21831AKLFT |
IDT
Eighteen Output Differential Buffer w/2 input mux for PCIe Gen3
1678A—07/13/10
9EX21831
Eighteen Output Differential Buffer w/2 input mux for PCIe Gen3
12
General SMBus serial interface information for the 9EX21831
How to Write:
Controller (host) sends a start bit.
Controller (host) sends the write address D4
(H)
ICS clock will
acknowledge
Controller (host) sends the begining byte location = N
ICS clock will
acknowledge
Controller (host) sends the data byte count = X
ICS clock will
acknowledge
Controller (host) starts sending
Byte N through
Byte N + X -1
(see Note 2)
ICS clock will
acknowledge each byte one at a time
Controller (host) sends a Stop bit
How to Read:
Controller (host) will send start bit.
Controller (host) sends the write address D4
(H)
ICS clock will
acknowledge
Controller (host) sends the begining byte
location = N
ICS clock will
acknowledge
Controller (host) will send a separate start bit.
Controller (host) sends the read address D5
(H)
ICS clock will
acknowledge
ICS clock will send the data byte count = X
ICS clock sends
Byte N + X -1
ICS clock sends
Byte 0 through byte X (if X
(H)
was written to byte 8).
Controller (host) will need to acknowledge each byte
Controllor (host) will send a not acknowledge bit
Controller (host) will send a stop bit
ICS (Sla ve /Re ce ive r)
T
WR
ACK
P
Byte N + X - 1
Data Byte Count = X
Beginning Byte N
stoP bit
X
Byt
e
Index Block Write Operation
Slave Address D4(H)
Beginning Byte = N
WRite
starT bit
Controlle r (Host)
T
starT bit
WR
WRite
RT
Repeat starT
RD
ReaD
Beginning Byte N
Byte N + X - 1
N
Not acknowledge
PstoP bit
ICS (Sla ve /Re ce ive r)
Controlle r (Host)
X
By
te
ACK
Data Byte Count = X
ACK
Slave Address D5(H)
Index Block Read Operation
Slave Address D4(H)
Beginning Byte = N
ACK
Note: The SMBus addresses assume that the select pins are ‘00’
相關PDF資料 |
PDF描述 |
|---|---|
| 9EX21831AKLF | 21831 SERIES, PLL BASED CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72 |
| 9FG104DGLFT | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| 9FG104DFLF | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| 9FG104DGILF | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| 9FG104DFILFT | 400 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 9EZCA0100000000 | 制造商:Eaton Corporation 功能描述:9E 20 & 30 kVA IAC - Tie for 1+1 Redundant with Maintenance Bypass |
| 9F-110 | 制造商:NA 功能描述: |
| 9F33U0 | 制造商:Thomas & Betts 功能描述:30A,PLG,REV,3P3W,DG,U0,600VAC, |
| 9F33U1 | 制造商:Thomas & Betts 功能描述:30A,PLG,REV,2P3W,DG,U1,125V |
| 9F33U2 | 制造商:Thomas & Betts 功能描述:30A,PLG,REV,2P3W,DG,U2,3P250VAC |
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