參數(shù)資料
型號(hào)： 9EX21501AKLF
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 時(shí)鐘及定時(shí)
英文描述： 21501 SERIES, PLL BASED CLOCK DRIVER, 15 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC64
封裝： ROHS COMPLIANT, PLASTIC, MLF-64
文件頁數(shù)： 11/15頁
文件大?。?/td> 200K
代理商： 9EX21501AKLF
IDT
15 Output PCIe G2/QPI Differential Buffer with 2:1 Input Mux
1578—01/18/11
9EX21501
15 Output PCIe G2/QPI Differential Buffer with 2:1 Input Mux
5
Datasheet
Electrical Characteristics - Absolute Maximum Ratings
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS NOTES
3.3V Core Supply Voltage
VDDA
4.6
V
1,2
3.3V Logic Supply Voltage
VDD
4.6
V
1,2
Input Low Voltage
VIL
GND-0.5
V
1
Input High Voltage
VIH
Except for SMBus interface
VDD+0.5V
V
1
Input High Voltage
VIHSMB
SMBus clock and data pins
5.5V
V
1
Storage Temperature
Ts
-65
150
°C
1
Junction Temperature
Tj
125
°C
1
Input ESD protection
ESD prot
Human Body Model
2000
V
1
1Guaranteed by design and characterization, not 100% tested in production.
2 Operation under these conditions is neither implied nor guaranteed.
Electrical Characteristics - Clock Input Parameters
TA = TCOM or TIND; Supply Voltage VDD/VDDA = 3.3 V +/-5%, See Test Loads for Loading Conditions
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS NOTES
Input High Voltage - DIF_IN
VIHDIF
Differential inputs
(single-ended measurement)
600
800
1150
mV
1
Input Low Voltage - DIF_IN
VILDIF
Differential inputs
(single-ended measurement)
VSS - 300
0
300
mV
1
Input Common Mode
Voltage - DIF_IN
VCOM
Common Mode Input Voltage
300
400
1000
mV
1
Input Amplitude - DIF_IN
VSWING
Peak to Peak value
300
750
1450
mV
1
Input Slew Rate - DIF_IN
dv/dt
Measured differentially
0.4
2
8
V/ns
1,2
Input Leakage Current
IIN
VIN = VDD , VIN = GND
-5
5
uA
1
Input Duty Cycle
dtin
Measurement from differential wavefrom
45
50
55
%
1
Input Jitter - Cycle to Cycle
JDIFIn
Differential Measurement
0
50
125
ps
1
1 Guaranteed by design and characterization, not 100% tested in production.
2Slew rate measured through +/-75mV window centered around differential zero
Electrical Characteristics - Phase Jitter Parameters
TA = TCOM or TIND; Supply Voltage VDD/VDDA = 3.3 V +/-5%, See Test Loads for Loading Conditions
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Notes
tjphPCIeG1
PCIe Gen 1
32/42
86
ps
(p-p)
1,2,3,4
PCIe Gen 2 Lo Band
10kHz < f < 1.5MHz
1.2/1.5
3
ps
(rms)
1,2,4
PCIe Gen 2 High Band
1.5MHz < f < Nyquist (50MHz)
2.1/2.7
3.1
ps
(rms)
1,2,4
tjphQPI
QPI
(133MHz, 4.8Gb/s, 6.4Gb/s 12UI)
0.25/0.28
0.5
ps
(rms)
1,4,5
tjphPCIeG1
PCIe Gen 1
2
10
ps
(p-p)
1,2,3
PCIe Gen 2 Lo Band
10kHz < f < 1.5MHz
0.0
0.3
ps
(rms)
1,2,6
PCIe Gen 2 High Band
1.5MHz < f < Nyquist (50MHz)
0.30
0.5
ps
(rms)
1,2,6
tjphQPI
QPI
(133MHz, 4.8Gb/s, 6.4Gb/s 12UI)
0.25
0.4
ps
(rms)
1,5,6
1 Applies to all outputs. Device driven by IDT CK410B+ (932S421CGLF) or equivalent
6 For RMS figures, additive jitter is calculated by solving the following equation: (Additive jitter)^2 = (total jittter)^2 - (input jitter)^2
4 First number is Low BW, second number is Hi BW.
5 Calculated from Intel-supplied Clock Jitter Tool v 1.6.4, with 7.8M rolloff
Phase Jitter, PLL Mode
Additive Phase Jitter,
Bypass mode
tjphPCIeG2
2 See http://www.pcisig.com for complete specs
3 Sample size of at least 100K cycles. This figures extrapolates to 108ps pk-pk @ 1M cycles for a BER of 1-12.
相關(guān)PDF資料
PDF描述
9EX21501AKILF 21501 SERIES, PLL BASED CLOCK DRIVER, 15 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC64
9EX21801AKLF PLL BASED CLOCK DRIVER, PQCC72
9EX21801AKLFT PLL BASED CLOCK DRIVER, PQCC72
9EX21831AKLFT 21831 SERIES, PLL BASED CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72
9EX21831AKLF 21831 SERIES, PLL BASED CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC72
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
9EX21501AKLFT 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 PCIE BUFFER - GEN2. 15 OUTPUTS w/2:1 INP RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
9EX21531AKLF 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 PCIE BUFFER - GEN3, 15 OUTPUTS w/2:1 INP RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
9EX21531AKLFT 制造商:Integrated Device Technology Inc 功能描述:PLL Clock Generator Single 64-Pin MLF T/R 制造商:Integrated Device Technology Inc 功能描述:64 MLF (LEAD FREE) - Tape and Reel 制造商:Integrated Device Technology Inc 功能描述:PCIE BUFFER - GEN3, 15 OUTPUTS w/2:1 INP
9EX21801AKILF 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
9EX21801AKILFT 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
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