參數資料
型號: 97ULP877AHLF-T
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘及定時
英文描述: 97ULP SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA52
封裝: ROHS COMPLIANT, PLASTIC, MO-205, MO-225, FBGA-52
文件頁數: 14/14頁
文件大?。?/td> 176K
代理商: 97ULP877AHLF-T
9
ICS97ULP877A
0981C—04/05/05
CLK_INC
CLK_INT
t()n+1
FB_INC
FB_INT
t()n
t() = Σ
n= N
1
n
t()n
(N is a large number of samples)
Yx
Yx, FB_OUTC
Yx, FB_OUTT
t(SKEW)
t(JIT_PER) =tC(n)
1
fo
Yx, FB_OUTC
Yx, FB_OUTT
Yx, FB_OUTC
Yx, FB_OUTT
tC(n)
1
fo
Parameter Measurement Information
Static Phase Offsel
Output Skew
Period Jitter
相關PDF資料
PDF描述
97ULP877BHLF-T 97ULP SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA52
97ULP877BHLF 97ULP SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA52
97ULP877BKLF 97ULP SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC40
97ULP877BH 97ULP SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA52
97ULPA877AHLF-T 97ULP SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA52
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