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參數(shù)資料
| 型號(hào)： | 935267009118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 2700 MHz, PDSO16 |
| 封裝： | 4.40 MM, PLASTIC, SSOP-16 |
| 文件頁數(shù)： | 24/27頁 |
| 文件大小： | 184K |
| 代理商： | 935267009118 |
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2000 Jul 11
6
Philips Semiconductors
Product specication
2.7 GHz I2C-bus controlled low phase
noise frequency synthesizer
TSA5059
The TSA5059 is controlled via the two-wire I2C-bus.
For programming, there is one 7-bit module address and
the R/W bit for selecting READ or WRITE mode. To be
able to have more than one synthesizer in an I2C-bus
system, one of four possible addresses is selected
depending on the voltage applied at pin AS (see Table 3).
The TSA5059 fulfils the fast mode I2C-bus, according to
the Philips I2C-bus specification. The I2C-bus interface is
designed in such a way that pins SCL and SDA can be
connected either to 5 or to 3.3 V pulled-up I2C-bus lines,
allowing the PLL synthesizer to be connected directly to
the bus lines of a 3.3 V microcontroller.
WRITE mode: R/W=0
After the address transmission (first byte), data bytes can
be sent to the device (see Table 1). Four data bytes are
needed to fully program the TSA5059. The bus transceiver
has an auto-increment facility that permits programming of
the TSA5059 within one single transmission
(address + 4 data bytes).
The TSA5059 can also be partly programmed on the
condition that the first data byte following the address is
byte 2 or 4. The meaning of the bits in the data bytes is
given in Table 1. The first bit of the first data byte
transmitted indicates whether byte 2 (first bit is logic 0) or
byte 4 (first bit is logic 1) will follow. Until an I2C-bus STOP
condition is sent by the controller, additional data bytes
can be entered without the need to re-address the device.
To allow a smooth frequency sweep for fine tuning, and
while the data of the dividing ratio of the main divider is in
data bytes 2, 3 and 4, it is necessary for changing the
frequency to send the data bytes 2 to 5 in a repeated
sending, or to finish an incomplete transmission by a
STOP condition. Repeated sending of data bytes 2 and 3
without ending the transmission does not change the
dividing ratio. To illustrate, the following data sequences
will change the dividing ratio:
Bytes 2, 3, 4 and 5
Bytes 4, 5, 2 and 3
Bytes 2, 3, 4 and STOP
Bytes 4, 5, 2 and STOP
Bytes 2, 3 and STOP
Bytes 2 and STOP
Bytes 4 and STOP.
Table 1
Write data format
Note
1. MSB is transmitted first.
BYTE
DESCRIPTION
MSB(1)
LSB
CONTROL BIT
1
address
1
0
MA1
MA0
0
A
2
programmable divider
0
N14
N13
N12
N11
N10
N9
N8
A
3
programmable divider
N7
N6
N5
N4
N3
N2
N1
N0
A
4
control data
1
N16
N15
PE
R3
R2
R1
R0
A
5
control data
C1
C0
XCE
XCS
P3
P2/T2
P1/T1
P0/T0
A
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