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| 型號(hào)： | 935262451518 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 顏色信號(hào)轉(zhuǎn)換 |
| 英文描述： | COLOR SIGNAL DECODER, PQFP100 |
| 封裝： | 14 X 14 X 1.40 MM, PLASTIC, SOT-407, LQFP-100 |
| 文件頁(yè)數(shù)： | 99/144頁(yè) |
| 文件大小： | 592K |
| 代理商： | 935262451518 |
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2000 Mar 15
58
Philips Semiconductors
Preliminary specication
PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC
comb lter, VBI-data slicer and high performance scaler
SAA7114H
8.6
Audio clock generation
(subaddresses 30H to 3FH)
SAA7114H incorporates generation of a field locked audio
clock, as an auxiliary function for video capture. An audio
sample clock, that is locked to the field frequency, makes
sure that there is always the same predefined number of
audio samples associated with a field, or a set of fields.
That ensures synchronous playback of audio and video
after digital recording (e.g. capture to hard disk), MPEG or
other compression, or non-linear editing.
8.6.1
MASTER AUDIO CLOCK
The audio clock is synthesized from the same crystal
frequency as the line-locked video clock is generated.
The master audio clock is defined by the parameters:
Audio master Clocks Per Field,
ACPF[17:0]32H[1:0]31H[7:0]30H[7:0] according to the
equation:
Audio master Clocks Nominal Increment,
ACNI[21:0]36H[5:0]35H[7:0]34H[7:0] according to the
equation:
See Table 21 for examples.
Remark: For standard applications the synthesized audio
clock AMCLK can be used directly as master clock and as
input clock for port AMXCLK (short cut) to generate
ASCLK and ALRCLK. For high-end applications it is
recommended to use an external analog PLL circuit to
enhance the performance of the generated audio clock.
ACPF[17:0]
round
audio frequency
field frequency
------------------------------------------
=
ACNI21:0]
round
audio frequency
crystal frequency
---------------------------------------------
2
23
×
=
Table 21 Programming examples for audio master clock generation
XTALO (MHz)
FIELD (Hz)
ACPF
ACNI
DECIMAL
HEX
DECIMAL
HEX
AMCLK = 256
× 48 kHz (12.288 MHz)
32.11
50
245760
3C000
3210190
30FBCE
59.94
205005
320CD
3210190
30FBCE
24.576
50
59.94
AMCLK = 256
× 44.1 kHz (11.2896 MHz)
32.11
50
225792
37200
2949362
2D00F2
59.94
188348
2DFBC
2949362
2D00F2
24.576
50
225792
37200
3853517
3ACCCD
59.94
188348
2DFBC
3853 517
3ACCCD
AMCLK = 256
× 32 kHz (8.192 MHz)
32.11
50
163840
28000
2140127
20A7DF
59.94
136670
215DE
2140127
20A7DF
24.576
50
163840
28000
2796203
2AAAAB
59.94
136670
215DE
2796203
2AAAAB
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