參數(shù)資料
型號(hào)： 87LPC762
廠商： NXP Semiconductors N.V.
元件分類(lèi)： 微控制器/微處理器
英文描述： Low power, low price, low pin count 20 pin microcontroller with 2 kbyte OTP
中文描述： 低功耗，低價(jià)格，低管腳數(shù)的2字節(jié)OTP 20引腳微控制器
文件頁(yè)數(shù)： 45/57頁(yè)
文件大?。?/td> 312K
代理商： 87LPC762
Philips Semiconductors
Preliminary data
87LPC762
Low power, low price, low pin count (20 pin)
microcontroller with 2 kbyte OTP
2001 Oct 26
42
SU01182
WATCHDOG
INTERRUPT
S
Q
20-BIT COUNTER
STATE CLOCK
WDTE (UCFG1.7)
BOD (xxx.x)
POR (xxx.x)
WATCHDOG
RESET
CLEAR
8 MSBs
8 TO 1 MUX
WATCHDOG
FEED DETECT
WDOVF
(WDCON.5)
WDS2–0
(WDCON.2–0)
WDTE + WDRUN
WDCLK * WDTE
500 kHz
R/C OSCILLATOR
ENABLE
CLOCK OUT
R
Figure 33. Block Diagram of the Watchdog Timer
BIT
WDCON.7, 6
WDCON.5
SYMBOL
—
WDOVF
FUNCTION
Reserved for future use. Should not be set to 1 by user programs.
Watchdog timer overflow flag. Set when a watchdog reset or timer overflow occurs. Cleared when
the watchdog is fed.
Watchdog run control. The watchdog timer is started when WDRUN = 1 and stopped when
WDRUN = 0. This bit is forced to 1 (watchdog running) if the WDTE configuration bit = 1.
Watchdog clock select. The watchdog timer is clocked by CPU clock/6 when WDCLK = 1 and by
the watchdog RC oscillator when WDCLK = 0. This bit is forced to 0 (using the watchdog RC
oscillator) if the WDTE configuration bit = 1.
Watchdog rate select.
Timeout Clocks
Minimum Time
Nominal Time
8,192
10 ms
16,384
20 ms
32,768
41 ms
65,536
82 ms
131,072
165 ms
262,144
330 ms
524,288
660 ms
1,048,576
1.3 sec
WDCON.4
WDRUN
WDCON.3
WDCLK
WDCON.2–0 WDS2–0
WDS2–0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Maximum Time
40 ms
80 ms
160 ms
320 ms
640 ms
1280 ms
2.60 sec
5.30 sec
25 ms
50 ms
100 ms
200 ms
400 ms
800 ms
1.60 sec
3.20 sec
WDS0
SU01476
WDS1
WDS2
WDCLK
WDRUN
WDOVF
—
—
0
1
2
3
4
5
6
7
WDCON
Reset Value: 30h for a watchdog reset.
10h for other rest sources if the watchdog is enabled via the WDTE configuration bit.
00h for other reset sources if the watchdog is disabled via the WDTE configuration bit.
Not Bit Addressable
Address: A7h
Figure 34. Watchdog Timer Control Register (WDCON)
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