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參數(shù)資料
| 型號： | 84221 |
| 廠商： | LSI Corporation |
| 英文描述： | Quad 100BaseTX/100BaseFX/10BaseT Physical Layer Device （Highly Integrated Ethernet Transceiver For Twisted Pair And Fiber Ethernet Applications）(四通道100BaseTX/100BaseFX/10BaseT 物理層處理器（高度集成的以太網(wǎng)雙絞線和光纖數(shù)據(jù)收發(fā)器）) |
| 中文描述： | 四100BaseTX/100BaseFX/10BaseT物理層裝置（高度集成的以太網(wǎng)收發(fā)器，雙絞線和光纖以太網(wǎng)的應(yīng)用）（四通道100BaseTX/100BaseFX/10BaseT物理層處理器（高度集成的以太網(wǎng)雙絞線和光纖數(shù)據(jù)收發(fā)器） ） |
| 文件頁數(shù)： | 26/70頁 |
| 文件大小： | 1017K |
| 代理商： | 84221 |
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26
MD400184/A
84221
Pins PHYAD[4:2] set the three most significant bits of the
PHY address. The two least significant bits of the PHY
address are set internally to match the channel number,
as shown in Table 5.
Table 5. PHYAD[1:0] Settings
2.23.2 Timing
Figure 10 shows a timing diagram for a MI serial port
cycle.
The MI serial port is idle when at least 32 continuous 1's
are detected on MDIO and remains idle as long as
continuous 1's are detected. During idle, MDIO is in the
PHYAD1
1
PHYAD0
1
Channel 3
Channel 2
1
0
Channel 1
0
1
Channel 0
0
0
high impedance state. When the MI serial port is in the
idle state, a 01 pattern on the MDIO pin initiates a serial
shift cycle. Data on MDIO is then shifted in on the next 14
rising edges of MDC (MDIO is high impedance). If the
register access mode is not enabled, on the next 16 rising
edges of MDC, data is either shifted in or out on MDIO,
depending on whether a write or read cycle was selected
with the bits READ and WRITE. After the 32 MDC cycles
have been completed, one complete register has been
read/written, the serial shift process is halted, data is
latched into the device, and MDIO goes into high
impedance state. Another serial shift cycle cannot be
initiated until the idle condition (at least 32 continuous 1's)
is detected.
2.23.3 Bit Types
Since the serial port is bidirectional, there are many types
of bits. The bit type definitions are summarized in Table 6.
Write bits (W) are inputs during a write cycle and are high
impedance during a read cycle. Read bits (R) are outputs
during a read cycle and high impedance during a write
cycle. Read/Write bits (R/W) are actually write bits that
TX_DI
±
TX_DI
±
a.) Normal Link Pulse (NLP)
b.) Fast Link Pulse (FLP)
D0
D15
D14
D3
D2
D1
Clock
Clock
Clock
Clock
Clock
Clock
Clock
Data
Data
Figure 8. NLP vs. FLP Link Pulse
Data
Data
Data
Data
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| 84717000 | MINIATURNAEHERUNGSSCHALTER 4MM GLATT PNP |
| 84717002 | MINIATURNAEHERUNGSSCHALTER M5 PNP |
| 84717100 | MINIATURNAEHERUNGSSCHALTER 4MM GLATT NPN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 842225 REV A1 | 制造商:Aavid Thermalloy 功能描述:- Bulk |
| 84222C | 功能描述:固定電感器 2.2uH 2.0A Mini SMT Power RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm |
| 8422303301B | 制造商:ESSEX 功能描述:SPDT 277V. COIL ENCLOSED RELAY |
| 84223C | 功能描述:固定電感器 22uH 0.6A Mini SMT Power RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm |
| 84224C | 功能描述:固定電感器 220uH 0.2A Mini SMT Power RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm |
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