參數(shù)資料
型號(hào): 82541ER
廠商: Intel Corp.
英文描述: 82541ER Gigabit Ethernet Controller
中文描述: 82541ER千兆位以太網(wǎng)控制器
文件頁(yè)數(shù): 33/48頁(yè)
文件大?。?/td> 284K
代理商: 82541ER
82541ER Gigabit Ethernet Controller
Datasheet
27
4.5.2
Link Interface Timing
Figure 10. Link Interface Rise/Fall Timing
4.5.3
EEPROM Interface
Table 21. Rise and Fall Times
Symbol
Parameter
Condition
Min
Max
Unit
TR
Clock rise time
0.8 V to 2.0 V
0.7
ns
TF
Clock fall time
2.0 V to 0.8 V
0.7
ns
TR
Data rise time
0.8 to 2.0 V
0.7
ns
TF
Data fall time
2.0 V to 0.8 V
0.7
ns
2.0 V
0.8 V
T
F
T
R
Table 22. Link Interface Clock Requirements
Symbol
Parameter
a
a. The EEPROM clock is derived from a 125 MHz internal clock.
Min
Typ
Max
Unit
TPW
Microwire EESK pulse width
T
PERIOD
x
ns
SPI EESK pulse width
T
PERIOD
x
ns
Table 23. Link Interface Clock Requirements
Symbol
Parameter
a
Min
Typ
Max
Unit
TDOS
EEDO setup time
TCYC*2
ns
TDOH
EEDO hold time
0
ns
a.
The EE_ DO setup and hold time is a function of the PCI bus clock cycle time but is referenced to O_ EE_ SK.
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